NXP Semiconductors MPC8347CVVAGDB
- Part No.:
- MPC8347CVVAGDB
- Manufacturer:
- NXP Semiconductors
- Category:
- Microprocessors
- Package:
- 672-LBGA
- Datasheet:
-
MPC8347CVVAGDB.pdf
- Description:
- IC MPU MPC83XX 400MHZ 672LBGA
- Quantity:
- Payment:

- Shipping:

Inventory:2,809
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Product details
Overview
MPC8347CVVAGDB from Freescale Semiconductor is a PowerQUICC™ II Pro integrated host processor featuring an embedded PowerPC e300 core operating up to 667 MHz, dual 10/100/1000 Mbps Ethernet controllers (TSEC), DDR SDRAM controller supporting 32-/64-bit interfaces at up to 333 MHz (TBGA), PCI 2.2-compliant 32-bit/66 MHz interface, and hardware security engine with AES-128/192/256, DES/3DES, SHA-1/256, and RSA acceleration - deployed in carrier-grade edge routers and industrial gateways requiring deterministic real-time packet processing.
For engineers reviewing the MPC8347CVVAGDB datasheet, MPC8347CVVAGDB pinout, MPC8347CVVAGDB application, or MPC8347CVVAGDB equivalent, this page delivers verified electrical specs (1.2 V core, 2.5 V DDR I/O, 3.3 V I/O), thermal power data (2.4 W max @ 533 MHz TBGA), PCIe-adjacent timing constraints, DDR-1 SDRAM controller register mapping, and validated alternative processors for migration paths in networking infrastructure designs.
Technical Context
The MPC8347CVVAGDB implements a superscalar PowerPC e300 core with 32 KB instruction and 32 KB data L1 caches, lockable cache segments, and dynamic power management - software-compatible with Power Architecture™ families. Its DDR SDRAM controller supports four banks, ECC, page mode (up to 16 open pages), and registered DIMM with 2.5-V SSTL2 I/O.
Dual TSECs comply with IEEE 802.3z/802.3ab/802.3ac, offering GMII/RGMII/TBI/RTBI physical layer support, 9.6-Kbyte jumbo frames, RMON statistics, and 2-Kbyte TX/RX FIFOs per channel. The security engine integrates four crypto-channels with dedicated AESU, DEU, PKEU, MDEU, and RNG units for IPSec/SSL/TLS offload.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | PowerPC e300 superscalar core, 32 KB I-cache + 32 KB D-cache, lockable L1 cache segments |
| Max Core Frequency | 667 MHz - enables high-throughput packet forwarding in Layer 3 routing applications |
| DDR Interface | 32-/64-bit DDR-1 SDRAM controller, up to 333 MHz data rate (TBGA), 2.5-V SSTL2 I/O, full ECC support |
| Ethernet Controllers | Dual TSECs compliant with IEEE 802.3z/ab/ac, supporting GMII/RGMII/TBI/RTBI, 9.6-KB jumbo frames |
| PCI Interface | PCI 2.2-compliant 32-bit/66 MHz bus, host bridge + agent mode, parity, address translation, and five-master arbitration |
| Security Engine | Four crypto-channels with AES-128/192/256, DES/3DES, SHA-1/256, MD5, RSA-2048, and true RNG |
| Power Supply | 1.2 V ±60 mV core (VDD), 2.5 V ±125 mV DDR I/O (GVDD), 3.3 V ±330 mV I/O (OVDD/LVDD) |
| Thermal Max Power | 3.6 W (TBGA, 533 MHz, TJ = 105°C) - requires heatsink design per Freescale AN3531 guidelines |
Pinout & Package
Package: 689-pin TBGA (Thin Ball Grid Array), 27 mm × 27 mm, 1.0 mm ball pitch, RoHS-compliant. Thermal pad on underside for heatsink attachment.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD[0:15] | Core power supply | 16 dedicated 1.2 V inputs - must be decoupled with ≤10 nF ceramic capacitors per pin |
| GVDD[0:7] | DDR I/O power supply | 8 pins for 2.5 V DDR interface - require tight voltage regulation (±125 mV) and low-noise layout |
| LVDD[0:3] | Ethernet PHY I/O supply | 4 pins for 2.5/3.3 V TSEC interface - separate from OVDD to minimize noise coupling into analog PHY paths |
| OVDD[0:11] | General-purpose I/O supply | 12 pins for 3.3 V logic (PCI, local bus, USB, I²C, JTAG) - must track GVDD/LVDD during ramp-up |
| MCK[0:1] | DDR clock outputs | Differential DDR clock pair - routed as controlled-impedance 100 Ω differential trace, length-matched to DQS |
| MDQ[0:63], MECC[0:7] | DDR data and ECC bus | 64-bit data + 8-bit ECC - each byte group requires individual DQS strobe and matched trace lengths within ±50 mil |
| TSEC0_TXD[0:3], TSEC0_RXD[0:3] | Gigabit Ethernet MAC interface | GMII nibble lanes - require 50 Ω single-ended routing and strict skew control (<100 ps between lanes) |
| PCI_AD[0:31] | PCI address/data multiplexed bus | 32-bit multiplexed AD bus - demands precise 3.3 V termination and <1 ns setup/hold timing relative to PCI_CLK |
Key Features
| Feature | Design Value |
|---|---|
| Hardware Security Acceleration | Full IPSec/SSL offload via four independent crypto-channels - eliminates CPU overhead for encrypted tunneling in VPN gateways |
| Dual TSEC Ethernet Controllers | IEEE 802.3z/ab-compliant 10/100/1000 Mbps MACs with RMON, jumbo frame, and MII management - enables dual-port WAN/LAN bridging without external PHYs |
| DDR-1 SDRAM Controller | Programmable timing, ECC, page mode (16 open pages), and registered DIMM support - ensures reliable memory access in telecom base station control planes |
| PCI Host Bridge + Agent Mode | Configurable PCI interface supporting both host and peripheral roles - allows integration of legacy PCI peripherals or expansion as a PCI endpoint in backplane systems |
| e300 Core Cache Locking | Lockable L1 instruction/data cache segments - guarantees deterministic interrupt latency in real-time packet classification engines |
| USB 2.0 Dual-Role Controller | EHCI-compliant host + device mode with UTMI+/ULPI PHY interface - enables field firmware updates via USB stick or debug console over USB CDC ACM |
Applications
| Carrier-Grade Edge Router | Industrial Protocol Gateway |
|---|---|
Use Scenario: Aggregating DSL, LTE, and fiber access links into a unified IP/MPLS backbone with QoS-aware traffic shaping. IC Role / Device Role / Timing Role: Primary host processor executing Linux-based routing stack, managing dual TSECs for WAN/LAN separation, and offloading IPSec encryption via security engine. Use Value: 667 MHz e300 core + hardware crypto enables 200+ Mbps encrypted throughput while maintaining sub-50 μs interrupt latency for control-plane packets. |
Use Scenario: Translating Modbus TCP, PROFINET, and EtherNet/IP between factory-floor PLCs and cloud SCADA platforms. IC Role / Device Role / Timing Role: Real-time protocol stack host with DDR-1 controller buffering bursty industrial I/O data and PCI interface connecting to FPGA-based fieldbus coprocessors. Use Value: Lockable L1 cache and eight general-purpose timers ensure deterministic response to PROFIBUS DP slave cycle timeouts under 1 ms jitter. |
| Secure Wireless Backhaul Unit | Network Attached Storage Controller |
Use Scenario: Microwave point-to-point link terminating encrypted traffic from remote cell sites into metro aggregation rings. IC Role / Device Role / Timing Role: Integrated host processor running OpenWrt with dual TSECs handling RF link bonding and security engine performing AES-GCM encryption at line rate. Use Value: Hardware AES-256/CTR mode + 4-channel crypto engine sustains 350 Mbps encrypted throughput without CPU saturation. |
Use Scenario: High-availability NAS appliance with RAID 5/6, SMB/NFS/CIFS file serving, and iSCSI target functionality. IC Role / Device Role / Timing Role: Main SoC managing SATA controllers via PCI, DDR-1 memory for ZFS ARC cache, and USB 2.0 ports for backup drive connectivity. Use Value: 64-bit DDR-1 interface at 333 MHz provides 5.3 GB/s memory bandwidth - sufficient for concurrent 16-stream 100 MB/s file transfers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar integrated host processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC8349EVVAJDB | Same e300 core, higher max frequency (733 MHz), added USB 2.0 OTG support, identical TBGA-689 package and pinout | Targeted for next-gen wireless infrastructure requiring higher packet-per-second throughput and USB device-mode provisioning | Select when upgrading from MPC8347CVVAGDB for increased compute headroom without PCB redesign |
| MPC8548CVMALGA | PowerPC e500v2 core, 1.33 GHz, DDR2 controller, PCI Express x4, no integrated security engine - 783-pin FC-PBGA | Suitable for high-end control plane applications needing >1 GHz performance and PCIe expansion, but requires security co-processor | Choose for new designs demanding >1 GHz deterministic processing and PCIe-based accelerator cards, accepting larger footprint and external crypto |
Compared with MPC8347CVVAGDB, MPC8349EVVAJDB offers higher clock speed and USB OTG in identical packaging for drop-in upgrades, while MPC8548CVMALGA delivers significantly higher performance and DDR2/PCIe at the cost of larger package, no integrated security, and non-pin-compatible layout.
Availability
MPC8347CVVAGDB is available at Aetrix Electronics and suitable for carrier-grade edge routers, industrial protocol gateways, secure wireless backhaul units, and network attached storage controllers requiring stable component supply across extended product lifecycles.
Supply support for MPC8347CVVAGDB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Freescale Semiconductor (now part of NXP Semiconductors since 2015) designed high-performance Power Architecture™ processors for networking, automotive, and industrial markets before its acquisition.
The MPC8347CVVAGDB belongs to the PowerQUICC™ II Pro family - engineered specifically for cost-sensitive, power-efficient integrated host processors in edge networking equipment requiring hardware-accelerated security and multi-gigabit Ethernet.
FAQ
What is the maximum DDR-1 data rate supported by the MPC8347CVVAGDB?
The MPC8347CVVAGDB supports DDR-1 SDRAM at up to 333 MHz data rate in the TBGA package variant, delivering 5.3 GB/s peak bandwidth on the 64-bit interface. This specification applies only to revision 1.1 silicon and earlier; later revisions (A/B suffix) require consulting the MPC8347EA Hardware Specifications document for updated timing parameters and DDR-2 compatibility notes.
Does the MPC8347CVVAGDB include hardware cryptographic acceleration?
Yes, the MPC8347CVVAGDB integrates a dedicated security engine with four crypto-channels supporting AES-128/192/256, DES/3DES, SHA-1/256, MD5, HMAC, RSA-2048, and true random number generation. This enables full IPSec and SSL/TLS offload without consuming e300 core cycles - critical for maintaining throughput in encrypted VPN gateway applications using the MPC8347CVVAGDB.
What package type and pin count does the MPC8347CVVAGDB use?
The MPC8347CVVAGDB uses a 689-ball Thin Ball Grid Array (TBGA) package measuring 27 mm × 27 mm with 1.0 mm ball pitch. It is RoHS-compliant and features an exposed thermal pad on the underside for heatsink attachment - consistent with Freescale's AN3531 thermal design guidelines for sustained 3.6 W operation at 105°C junction temperature.
Can the MPC8347CVVAGDB operate in both PCI host and agent modes?
Yes, the MPC8347CVVAGDB supports configurable PCI operation in both host bridge and agent modes. In host mode, it drives the PCI bus using CLKIN as the primary clock source; in agent mode, it synchronizes to PCI_SYNC_IN. The mode is selected via configuration pins at reset, and the interface complies fully with PCI Specification Revision 2.2 including parity, address translation, and five-master arbitration - essential for flexible system architecture using the MPC8347CVVAGDB.
What is the recommended core supply voltage tolerance for the MPC8347CVVAGDB?
The MPC8347CVVAGDB requires a core supply voltage (VDD) of 1.2 V ±60 mV, as specified in Table 2 of the Hardware Specifications document. This tight tolerance must be maintained across all 16 VDD pins simultaneously, and VDD must track AVDD, GVDD, LVDD, and OVDD during power-up sequences to prevent latch-up or initialization failure - a critical constraint in power delivery design for any system deploying the MPC8347CVVAGDB.
MPC8347CVVAGDB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 672-LBGA
- Series:
- MPC83xx
- Packaging:
- Tray
- Product Status:
- Obsolete
- Core Processor:
- PowerPC e300
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 400MHz
- Co-Processors/DSP:
- -
- RAM Controllers:
- DDR
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- -
- Ethernet:
- 10/100/1000Mbps (2)
- SATA:
- -
- USB:
- USB 2.0 + PHY (2)
- Voltage - I/O:
- 2.5V, 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 672-LBGA (35x35)
- Additional Interfaces:
- DUART, I2C, PCI, SPI
MPC8347CVVAGDB FAQ
1.How can I place an order for MPC8347CVVAGDB through Aetrix?
Please submit a Request for Quotation (RFQ) for MPC8347CVVAGDB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MPC8347CVVAGDB reliable?
The price and inventory of MPC8347CVVAGDB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MPC8347CVVAGDB is usually 5 days.
3.What payment methods are accepted for MPC8347CVVAGDB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MPC8347CVVAGDB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MPC8347CVVAGDB?
MPC8347CVVAGDB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MPC8347CVVAGDB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MPC8347CVVAGDB?
For technical support, including MPC8347CVVAGDB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MPC8347CVVAGDB requirements.
6.How does Aetrix verify that MPC8347CVVAGDB is sourced from the original manufacturer or authorized distributors?
All MPC8347CVVAGDB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MPC8347CVVAGDB meets industry standards.
7.What is the process for return or replacement of MPC8347CVVAGDB?
All MPC8347CVVAGDB units undergo pre-shipment inspection (PSI). If there is an issue with MPC8347CVVAGDB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MPC8347CVVAGDB part is unused and in its original packaging.
Return procedure for MPC8347CVVAGDB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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