NXP Semiconductors MPC8347CVVAJDB

Overview

MPC8347CVVAJDB from NXP Semiconductors (formerly Freescale) is a PowerQUICC™ II Pro integrated host processor featuring an embedded PowerPC e300 core operating up to 667 MHz, dual 10/100/1000-Mbps Ethernet controllers (TSECs), DDR SDRAM controller supporting 32-/64-bit interfaces at up to 333 MHz (TBGA), PCI 2.2 interface, and hardware security engine with AES, DES, SHA, and RSA acceleration - deployed in network edge routers, industrial gateways, and secure communications appliances.

For engineers reviewing the MPC8347CVVAJDB datasheet, MPC8347CVVAJDB pinout, MPC8347CVVAJDB application, or MPC8347CVVAJDB equivalent, this page delivers verified electrical specs (1.2 V core, 2.5 V DDR I/O, 3.3 V I/O), thermal power data (up to 3.6 W typical), clock timing constraints (66 MHz max CLKIN), reset sequencing requirements, and validated alternative part options for migration or sourcing continuity.

Technical Context

The MPC8347CVVAJDB implements a superscalar PowerPC e300 core with 32 KB instruction and 32 KB data L1 caches, lockable cache segments, and dynamic power management. Its DDR SDRAM controller supports programmable timing, ECC, auto-refresh, and registered DIMM compatibility with 2.5-V SSTL2 I/O.

It integrates dual IEEE 802.3-compliant TSECs with RGMII/GMII/TBI interfaces, PCI 2.2 host/agent mode with parity and coherency support, and a dedicated security engine with four crypto-channels handling IPSec/SSL offload via AES-128/192/256, 3DES, SHA-1/256, and RSA up to 2048-bit.

Key Specifications

Pinout & Package

Package: TBGA-757 (27 mm × 27 mm, 1.0 mm pitch). Pinout defined per Section 18 ("Package and Pin Listings") of MPC8347EEC Rev. 11, with 757 terminals including dedicated DDR, PCI, TSEC, USB, and JTAG signal groups. Thermal pad on underside requires solder connection for thermal management.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar integrated host processor applications.

Compared with MPC8347CVVAJDB, MPC8349EVVAJDB offers higher clock headroom and DDR2 readiness while maintaining identical pinout and software ABI, whereas MPC8377ERVAAJDB introduces SerDes and PCIe - enabling modern interconnects but requiring PCB redesign and firmware adaptation.

Availability

MPC8347CVVAJDB is available at Aetrix Electronics and suitable for network edge routers, industrial protocol gateways, and secure wireless access points requiring stable component supply, long-term lifecycle support, and traceable sourcing for production programs.

Supply support for MPC8347CVVAJDB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT markets, with heritage from Freescale's PowerQUICC portfolio.

The MPC8347CVVAJDB belongs to the PowerQUICC™ II Pro family, designed specifically for cost-sensitive, high-reliability embedded networking applications requiring integrated processing, multi-protocol connectivity, and hardware-accelerated security.

FAQ

What is the maximum DDR data rate supported by the MPC8347CVVAJDB?

The MPC8347CVVAJDB supports DDR-1 SDRAM at up to 333 MHz data rate in the TBGA package, delivering 5.3 GB/s peak bandwidth on the 64-bit interface. This is confirmed in Section 6 of the MPC8347EEC Rev. 11 specification, which states "32- or 64-bit data interface, up to 333-MHz data rate for TBGA". The PBGA variant is limited to 266 MHz. MPC8347CVVAJDB implements 2.5-V SSTL2 I/O for DDR signaling and supports full ECC, page mode, and registered DIMMs.

Does the MPC8347CVVAJDB support PCIe or only PCI?

The MPC8347CVVAJDB supports only PCI Specification Revision 2.2 - not PCIe. It features a 32-bit, 66 MHz PCI interface with host/agent capability, parity, and hardware coherency, as detailed in Section 13 of the MPC8347EEC Rev. 11 document. PCIe support was introduced in later PowerQUICC II Pro derivatives like the MPC8377E. MPC8347CVVAJDB lacks PCIe PHY, configuration space extensions, or link training logic required for PCIe compliance.

What are the power supply sequencing requirements for MPC8347CVVAJDB?

MPC8347CVVAJDB does not require strict power supply sequencing, but Freescale recommends applying core voltage (VDD = 1.2 V) before I/O voltages (GVDD, OVDD, LVDD) and asserting PORESET before supplies ramp fully. This minimizes active driving on I/O pins during power-up transients. All supplies - VDD, AVDD, GVDD, LVDD, and OVDD - must track each other directionally (Section 2.1.2, Table 2). Failure to meet tracking or early PORESET assertion may cause undefined boot behavior or latch-up risk.

Is the MPC8347CVVAJDB pin-compatible with the MPC8349E series?

Yes, the MPC8347CVVAJDB is pin-compatible with the MPC8349E series (e.g., MPC8349EVVAJDB) in the same TBGA-757 package. Both share identical pin assignments, power domains, and signal definitions per Freescale's ordering matrix and package drawings. Software and PCB layout are interchangeable, enabling direct upgrade paths. However, MPC8349E adds DDR2 support and raises the max core frequency to 733 MHz - enhancements enabled within the same footprint and pinout.

What cryptographic algorithms does the MPC8347CVVAJDB security engine accelerate?

The MPC8347CVVAJDB security engine accelerates AES (128/192/256-bit keys, ECB/CBC/CTR/CCM modes), DES/3DES (ECB/CBC), SHA-1/SHA-256, MD5, HMAC, RSA up to 2048-bit, and RC4. These are implemented in dedicated execution units (AESU, DEU, MDEU, PKEU, AFEU) with four independent crypto-channels supporting descriptor chains. The engine is optimized for IPSec, SSL/TLS, and iSCSI offload, as specified in Section 1 (Overview) and Section 4 (Security Engine) of MPC8347EEC Rev. 11.