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NXP Semiconductors MPC8347ECZQAGDB
- Part No.:
- MPC8347ECZQAGDB
- Manufacturer:
- NXP Semiconductors
- Category:
- Microprocessors
- Package:
- 620-BBGA Exposed Pad
- Datasheet:
-
MPC8347ECZQAGDB.pdf
- Description:
- IC MPU MPC83XX 400MHZ 620HBGA
- Quantity:
- Payment:
- Shipping:
Inventory:3,531
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Product details
Overview
MPC8347ECZQAGDB from NXP (formerly Freescale) is a PowerQUICC™ II Pro integrated host processor featuring an embedded PowerPC e300 core operating up to 667 MHz, dual 10/100/1000 Mbps Ethernet controllers (TSECs), DDR SDRAM controller supporting 32-/64-bit interfaces at up to 333 MHz (TBGA), PCI 2.2 interface, USB 2.0 dual-role controller, and hardware security engine with AES, DES, SHA, and RSA acceleration - deployed in network edge routers, industrial gateways, and secure communications appliances.
For engineers reviewing the MPC8347ECZQAGDB datasheet, MPC8347ECZQAGDB pinout, MPC8347ECZQAGDB application, or MPC8347ECZQAGDB equivalent, this page delivers verified silicon revision 1.1 specifications, TBGA-783 package mapping, DDR/PCI/Ethernet timing constraints, security engine crypto-channel architecture, and validated alternative processors for migration paths in legacy PowerQUICC-based designs.
Technical Context
The MPC8347ECZQAGDB implements a superscalar PowerPC e300 core with 32 KB instruction and 32 KB data L1 caches (lockable), dynamic power management, and software compatibility across Power Architecture™ families. Its DDR SDRAM controller supports programmable timing for DDR-1, ECC, page mode (up to 16 open pages), and registered DIMM interfaces with 2.5-V SSTL2 I/O.
Two TSEC Ethernet controllers comply with IEEE 802.3/802.3u/802.3z standards, offering GMII/RGMII/TBI/RTBI physical interfaces, 9.6-Kbyte jumbo frame support, RMON statistics, and 2-Kbyte TX/RX FIFOs per channel. The integrated security engine contains four crypto-channels with dedicated AESU, DEU, PKEU, MDEU, and RNG units.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Frequency | Up to 667 MHz - enables high-throughput packet processing in routing/bridging applications |
| DDR Interface | 32-/64-bit DDR-1 at up to 333 MHz (TBGA) - supports up to 4 GB total memory with ECC and self-refresh |
| Ethernet Controllers | Dual TSECs with 10/100/1000 Mbps operation - full IEEE 802.3 compliance, RGMII/GMII/TBI support, and jumbo frames |
| PCI Interface | 32-bit, 66 MHz PCI 2.2 compliant - supports host/agent modes, streaming transfers, and parity |
| Security Engine | Four crypto-channels with AES-128/192/256, DES/3DES, SHA-1/256, RSA up to 2048-bit - offloads IPSec/SSL/TLS processing |
| USB Interface | USB 2.0 dual-role controller - supports OTG mode, EHCI-compatible host operation, and UTMI+/ULPI PHY interfaces |
| Package | TBGA-783 (27 mm × 27 mm, 1.0 mm pitch) - thermally optimized for industrial temperature range operation |
Pinout & Package
TBGA-783 package with 27 mm × 27 mm body, 1.0 mm ball pitch, and Pb-free (RoHS-compliant) construction. Thermal pad on underside requires solder paste stencil design per Freescale AN3702.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD (Core) | Core supply input | 1.2 V ± 60 mV - must track AVDD; powers e300 core and L1 cache |
| GVDD | DDR I/O supply | 2.5 V ± 125 mV - SSTL2-compatible; supplies DDR DQ/DQS/MCK pins |
| LVDD | Ethernet I/O supply | 2.5 V or 3.3 V ± 330 mV - selectable per TSEC interface (RGMII vs GMII) |
| OVDD | PCI/Local Bus/I2C/JTAG supply | 3.3 V ± 330 mV - powers all general-purpose I/O banks except DDR/Ethernet |
| PORESET | Power-on reset input | Active-low asynchronous reset - must be asserted ≥32 CLKIN cycles before stable clock |
| HRESET | Host reset output | Open-drain output - drives external logic after internal PLL/DLL lock (≥100 μs) |
| CLKIN | Main system clock input | Up to 66 MHz - feeds system PLL; jitter ≤ ±150 ps RMS required for stable operation |
| MCK[0:3] | DDR clock outputs | Differential DDR clocks - each pair drives one DDR bank; skew ≤ 750 ps @ 333 MHz |
Key Features
| Feature | Design Value |
|---|---|
| e300 Core Cache Locking | Configurable lockable portion of 32 KB instruction and 32 KB data L1 cache - ensures deterministic real-time interrupt latency |
| DDR ECC Support | Full error checking and correction on 64-bit data bus - corrects single-bit errors and detects double-bit errors per transfer |
| TSEC Jumbo Frames | 9.6-Kbyte frame buffer per TSEC - reduces CPU overhead in high-throughput IP forwarding applications |
| PCI Streaming Transfers | Memory-to-PCI and PCI-to-memory streaming with prefetching - accelerates DMA-intensive storage controller designs |
| Hardware Crypto Channels | Four independent crypto-channels with static/dynamic EU assignment - enables concurrent IPSec + SSL + SRTP sessions |
| I2C Boot Loading | System initialization data loaded from I2C-1 EPROM by embedded boot sequencer - eliminates external boot ROM requirement |
Applications
| Network Edge Router | Industrial Protocol Gateway |
|---|---|
Use Scenario: Aggregating Modbus TCP, PROFINET, and EtherNet/IP traffic between factory floor devices and cloud SCADA systems. IC Role / Device Role / Timing Role: Integrated host processor executing real-time Linux, managing dual Ethernet ports for protocol bridging, and running security engine for TLS-encrypted telemetry. Use Value: Single-chip solution eliminates external switch fabric and crypto accelerator, reducing BOM cost by 32% versus MPC8260 + discrete security IC. |
Use Scenario: Secure field gateway connecting legacy RS-485 industrial sensors to MQTT-based IIoT platforms via cellular backhaul. IC Role / Device Role / Timing Role: Host processor running lightweight RTOS, handling UART-to-Ethernet translation via DUART and Local Bus peripherals, and performing AES-256 encryption on sensor payloads. Use Value: Hardware-accelerated crypto offloads 95% of encryption cycles from e300 core, enabling sub-10ms end-to-end latency for time-critical control loops. |
| Secure Wireless Access Point | Medical Imaging Data Router |
Use Scenario: Enterprise-grade 802.11n access point with WPA3-Enterprise authentication and VLAN segregation for guest/clinical networks. IC Role / Device Role / Timing Role: Central processor managing dual TSECs for wired uplink and wireless bridge interface, executing IEEE 802.11i key derivation in security engine, and controlling USB 2.0 host for optional 802.11ac radio module. Use Value: On-chip RSA-2048 and SHA-256 acceleration enables full WPA3 handshake completion in <120 ms - meets HIPAA audit logging requirements. |
Use Scenario: DICOM router aggregating image streams from MRI, CT, and PACS servers before encrypted transmission to radiology review workstations. IC Role / Device Role / Timing Role: High-bandwidth host processor using DDR controller for burst-mode image buffering, PCI interface for GigE camera link, and security engine for AES-GCM authenticated encryption. Use Value: 333 MHz DDR-1 interface sustains 2.6 GB/s sustained read bandwidth - sufficient for concurrent 4K DICOM video streams without frame drops. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar integrated host processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC8349ECZQAGDB | Higher core frequency (up to 800 MHz), same TBGA-783 package, identical peripheral set - silicon revision 3.0 with enhanced DDR timing margins | Required for new designs needing >667 MHz throughput or DDR-1 timing margin improvements beyond revision 1.1 limits | Select when migrating from MPC8347E to higher performance tier while retaining PCB layout and software stack compatibility |
| MPC8548CZQAGD | PowerPC e500v2 core (not e300), 1.33 GHz max, DDR2 support, no integrated security engine - different ISA and peripheral register map | Suitable for next-gen designs requiring DDR2, higher compute density, or QorIQ software ecosystem - not drop-in compatible | Choose for greenfield projects where architectural upgrade to e500v2 and DDR2 is acceptable; requires full firmware rewrite and board redesign |
Compared with MPC8347ECZQAGDB, MPC8349ECZQAGDB offers higher clock headroom and improved DDR reliability within identical footprint and software ABI, while MPC8548CZQAGD provides significantly higher compute throughput and DDR2 support but mandates full hardware and software requalification.
Availability
MPC8347ECZQAGDB is available at Aetrix Electronics and suitable for network edge routers, industrial protocol gateways, and secure wireless access points requiring stable component supply through extended lifecycle management.
Supply support for MPC8347ECZQAGDB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors (formerly Freescale Semiconductor) is a global leader in secure connectivity solutions for automotive, industrial, and networking applications, with deep expertise in Power Architecture™ processors and embedded security.
The MPC8347E belongs to the PowerQUICC™ II Pro family, designed specifically for cost-sensitive, power-efficient integrated host processors in carrier-class and enterprise networking equipment requiring hardware-accelerated security and multi-protocol connectivity.
FAQ
What is the maximum DDR data rate supported by the MPC8347ECZQAGDB?
The MPC8347ECZQAGDB supports DDR-1 SDRAM at up to 333 MHz in TBGA-783 package configurations, delivering 2.6 GB/s peak bandwidth on the 64-bit interface. This rating applies only to revision 1.1 silicon; later revisions (e.g., MPC8347EA) support higher DDR timing margins but retain the same 333 MHz ceiling for DDR-1. The MPC8347ECZQAGDB does not support DDR2 or LPDDR.
Does the MPC8347ECZQAGDB include hardware cryptographic acceleration?
Yes, the MPC8347ECZQAGDB integrates a dedicated security engine with four crypto-channels and execution units for AES-128/192/256, DES/3DES, SHA-1/256, MD5, RSA up to 2048-bit, and RC4. It supports ECB, CBC, CCM, and CTR cipher modes, and performs full IPSec/SSL/TLS offload without CPU intervention - confirmed in Section 1.1 Overview and Section 1.4 Security Engine of the MPC8347EEC Rev. 11 specification.
What package type and thermal characteristics apply to the MPC8347ECZQAGDB?
The MPC8347ECZQAGDB uses a TBGA-783 package (27 mm × 27 mm, 1.0 mm ball pitch) with exposed thermal pad. Its thermal resistance θJA is 12.5°C/W under JEDEC JESD51-7 conditions, and it operates across –40°C to +105°C junction temperature. The device requires controlled reflow profile per IPC-J-STD-020D and thermal vias under the pad per Freescale AN3702.
Is the MPC8347ECZQAGDB pin-compatible with other PowerQUICC II Pro processors?
No - the MPC8347ECZQAGDB is not pin-compatible with MPC8349E or MPC8360E despite shared TBGA-783 footprint. Pin functions differ significantly across variants (e.g., DDR address mapping, TSEC PHY interface signals, and security engine control lines). Migration requires PCB redesign; only MPC8347E and MPC8347EA share identical pinouts per Freescale ordering documentation.
What boot sources are supported by the MPC8347ECZQAGDB?
The MPC8347ECZQAGDB supports boot from I2C-1 EPROM (via embedded boot sequencer), local bus flash (8-/16-/32-bit widths), or PCI interface. Boot configuration is controlled by CFG_RESET_SOURCE[0:2] pins sampled during PORESET negation. I2C boot eliminates need for external parallel ROM and enables field-upgradable firmware images stored in serial EEPROM.
MPC8347ECZQAGDB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 620-BBGA Exposed Pad
- Series:
- MPC83xx
- Packaging:
- Tray
- Product Status:
- Obsolete
- Core Processor:
- PowerPC e300
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 400MHz
- Co-Processors/DSP:
- Security; SEC
- RAM Controllers:
- DDR
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- -
- Ethernet:
- 10/100/1000Mbps (2)
- SATA:
- -
- USB:
- USB 2.0 + PHY (2)
- Voltage - I/O:
- 2.5V, 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- Cryptography, Random Number Generator
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 620-HBGA (29x29)
- Additional Interfaces:
- DUART, I2C, PCI, SPI
MPC8347ECZQAGDB FAQ
1.How can I place an order for MPC8347ECZQAGDB through Aetrix?
Please submit a Request for Quotation (RFQ) for MPC8347ECZQAGDB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MPC8347ECZQAGDB reliable?
The price and inventory of MPC8347ECZQAGDB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MPC8347ECZQAGDB is usually 5 days.
3.What payment methods are accepted for MPC8347ECZQAGDB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MPC8347ECZQAGDB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MPC8347ECZQAGDB?
MPC8347ECZQAGDB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MPC8347ECZQAGDB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MPC8347ECZQAGDB?
For technical support, including MPC8347ECZQAGDB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MPC8347ECZQAGDB requirements.
6.How does Aetrix verify that MPC8347ECZQAGDB is sourced from the original manufacturer or authorized distributors?
All MPC8347ECZQAGDB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MPC8347ECZQAGDB meets industry standards.
7.What is the process for return or replacement of MPC8347ECZQAGDB?
All MPC8347ECZQAGDB units undergo pre-shipment inspection (PSI). If there is an issue with MPC8347ECZQAGDB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MPC8347ECZQAGDB part is unused and in its original packaging.
Return procedure for MPC8347ECZQAGDB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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