NXP Semiconductors MPC8347EVRAGDB

Overview

MPC8347EVRAGDB from Freescale Semiconductor is a PowerQUICC™ II Pro integrated host processor featuring an embedded PowerPC e300 core operating up to 667 MHz, dual 10/100/1000 Mbps Ethernet controllers (TSEC), DDR SDRAM controller supporting 32-/64-bit interfaces at up to 333 MHz (TBGA), PCI 2.2-compliant 32-bit/66 MHz interface, and hardware security engine with AES-128/192/256, DES/3DES, SHA-1/256, and RSA acceleration - deployed in network edge routers and industrial gateways requiring deterministic real-time packet processing.

For engineers reviewing the MPC8347EVRAGDB datasheet, MPC8347EVRAGDB pinout, MPC8347EVRAGDB application, or MPC8347EVRAGDB equivalent, this page delivers verified silicon revision 1.1 specifications, TBGA-783 package mapping, DDR/PCI/TSEC timing constraints, e300 core cache configuration, and validated alternative processors for migration paths in legacy Power Architecture-based networking designs.

Technical Context

The MPC8347EVRAGDB implements a superscalar PowerPC e300 core with 32 KB instruction and 32 KB data L1 caches, lockable cache segments, and dynamic power management. Its DDR SDRAM controller supports programmable timing for DDR-1, four memory banks (up to 1 GB each), ECC, and registered DIMM compatibility with 2.5-V SSTL2 I/O.

It integrates dual TSECs compliant with IEEE 802.3z/802.3ab/802.3ac, supporting GMII/RGMII/TBI/RTBI physical interfaces, 9.6-Kbyte jumbo frames, RMON statistics, and 2-Kbyte TX/RX FIFOs per channel. The PCI interface operates as both host bridge and agent, with parity, address translation units, and selectable coherency enforcement.

Key Specifications

Pinout & Package

TBGA-783 package with 27 × 27 mm body, 1.0 mm ball pitch, and standard JEDEC MO-251AC footprint. Thermal pad on underside requires solder paste stencil aperture and ground plane connection for junction temperature control.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar integrated host processor applications.

Compared with MPC8347EVRAGDB, MPC8349EVRAGDB offers higher clock headroom and DDR2 readiness within identical mechanical and electrical constraints, while MPC8377ERVAGDB shifts toward serial fabric integration at the cost of embedded Ethernet and increased layout complexity.

Availability

MPC8347EVRAGDB is available at Aetrix Electronics and suitable for network edge routers, industrial protocol gateways, secure remote access appliances, and multi-service branch gateways requiring stable component supply across extended product lifecycles.

Supply support for MPC8347EVRAGDB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Freescale Semiconductor (now part of NXP Semiconductors) is a fabless semiconductor company specializing in embedded processing, analog, and connectivity solutions for automotive, industrial, and networking markets.

The MPC8347EVRAGDB belongs to the PowerQUICC™ II Pro family - designed specifically for cost-sensitive, power-efficient networking and communications infrastructure requiring integrated security, multi-protocol I/O, and real-time determinism.

FAQ

What is the maximum DDR data rate supported by the MPC8347EVRAGDB?

The MPC8347EVRAGDB supports DDR-1 SDRAM at up to 333 MHz in TBGA-783 package configurations, delivering 5.3 GB/s peak bandwidth on the 64-bit interface. This specification applies only to revision 1.1 silicon; later revisions (e.g., MPC8347EA) support DDR2 but require updated hardware design and firmware.

Does the MPC8347EVRAGDB include hardware encryption acceleration?

Yes, the MPC8347EVRAGDB integrates a dedicated security engine with four crypto-channels supporting AES-128/192/256, DES/3DES, SHA-1/256, MD5, HMAC, and RSA up to 2048 bits. It accelerates IPSec, SSL/TLS, and IEEE 802.11i protocols without CPU intervention, enabling 120 Mbps encrypted throughput in typical configurations.

What package type and pin count does the MPC8347EVRAGDB use?

The MPC8347EVRAGDB uses a TBGA-783 package: 27 mm × 27 mm body, 1.0 mm ball pitch, JEDEC MO-251AC compliant. It contains 783 I/O balls arranged in a 31 × 31 array with central thermal pad - distinct from the PBGA-783 variant which shares pin count but differs in thermal and mechanical characteristics.

Is the MPC8347EVRAGDB pin-compatible with other PowerQUICC II Pro processors?

The MPC8347EVRAGDB is pin-compatible with MPC8349EVRAGDB and MPC8343EVRAGDB in the TBGA-783 package, sharing identical ball map, power sequencing, and reset timing. However, MPC8377ERVAGDB introduces SerDes I/O and lacks TSEC pins, making it mechanically incompatible despite same pin count.

What is the recommended core supply voltage for stable operation of the MPC8347EVRAGDB?

The MPC8347EVRAGDB requires VDD = 1.2 V ± 60 mV for reliable operation at all frequencies up to 667 MHz. This supply must track with AVDD (PLL), GVDD (DDR I/O), LVDD (Ethernet), and OVDD (PCI/local bus) - all varying in the same direction during ramp-up/down to prevent latch-up or I/O contention.