NXP Semiconductors MPC8347EVVAGDB
- Part No.:
- MPC8347EVVAGDB
- Manufacturer:
- NXP Semiconductors
- Category:
- Microprocessors
- Package:
- 672-LBGA
- Datasheet:
-
MPC8347EVVAGDB.pdf
- Description:
- IC MPU MPC83XX 400MHZ 672LBGA
- Quantity:
- Payment:

- Shipping:

Inventory:3,489
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Product details
Overview
MPC8347EVVAGDB from NXP (formerly Freescale) is a PowerQUICC™ II Pro integrated host processor featuring an embedded PowerPC e300 core operating up to 667 MHz, dual 10/100/1000-Mbps Ethernet controllers (TSEC), DDR SDRAM controller supporting 32-/64-bit interfaces at up to 333 MHz (TBGA), PCI 2.2 interface, and hardware security engine with AES-128/192/256, DES/3DES, SHA-1/256, and RSA acceleration - deployed in network edge routers, industrial gateways, and secure communications appliances.
For engineers reviewing the MPC8347EVVAGDB datasheet, MPC8347EVVAGDB pinout, MPC8347EVVAGDB application, or MPC8347EVVAGDB equivalent, this page delivers verified electrical specs (1.2 V core, 2.5 V DDR I/O, 3.3 V I/O), thermal power data (up to 3.6 W max, TBGA), silicon revision context (Rev. 1.1), and functional mapping for TSEC, DDR, PCI, USB 2.0 OTG, and security crypto-channel deployment.
Technical Context
The MPC8347EVVAGDB implements a superscalar PowerPC e300 core with 32 KB instruction and 32 KB data L1 caches, lockable cache segments, and dynamic power management. Its DDR SDRAM controller supports programmable timing, ECC, registered DIMMs, and 2.5-V SSTL2 I/O - with data rates up to 333 MHz on TBGA packages.
It integrates two IEEE 802.3-compliant TSECs with RGMII/GMII/TBI interfaces, MII management, 9.6-KB jumbo frames, and 2-KB Tx/Rx FIFOs per channel. The security engine contains four crypto-channels with dedicated AESU, DEU, PKEU, MDEU, and RNG units - enabling concurrent IPSec, SSL/TLS, and iSCSI offload without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | PowerPC e300 superscalar core, software-compatible with Power Architecture™ family, enables legacy code reuse and toolchain continuity. |
| Max Core Frequency | 667 MHz - determines instruction throughput and real-time processing capability for routing, firewalling, and protocol stack execution. |
| DDR Interface | 32-/64-bit DDR-1 SDRAM controller with ECC, 333-MHz data rate (TBGA), 2.5-V SSTL2 I/O - supports up to 4 GB memory with error resilience. |
| Ethernet Controllers | Dual TSECs compliant with IEEE 802.3z/u/ac, supporting 10/100/1000 Mbps full-duplex via RGMII/GMII/TBI - enables dual-port gigabit switching or WAN/LAN separation. |
| Security Engine | Four crypto-channels with AES-128/192/256, DES/3DES, SHA-1/256, RSA-2048, and HMAC - accelerates IPSec/IKE, TLS handshake, and secure boot operations. |
| PCI Interface | 32-bit, 66-MHz PCI 2.2 host/agent interface with parity, prefetching, and coherency support - connects to PHYs, switches, or legacy peripherals without bridge logic. |
| USB Support | USB 2.0 dual-role controller (OTG) with EHCI compatibility, 480-Mbps high-speed mode, and UTMI+/ULPI PHY interface - enables firmware update via USB device or peripheral attachment as host. |
Pinout & Package
Package: 672-pin TBGA (Thin Ball Grid Array), 35 mm × 35 mm, 1.0 mm ball pitch, RoHS-compliant. Thermal pad on underside requires solder paste stencil design for optimal heat dissipation in industrial ambient conditions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| MCK[0:3] | DDR Clock Outputs | Differential clock pairs driving DDR SDRAM; require matched trace length and 50-Ω termination to MVREF for signal integrity at 333 MHz. |
| MDQ[0:63], MECC[0:7] | DDR Data I/O | 64-bit data + 8-bit ECC bus; supports burst transfers, read-modify-write, and on-the-fly ECC correction - critical for fault-tolerant control plane memory. |
| TSEC0_TXD[0:3], TSEC0_RXD[0:3] | Gigabit Ethernet PHY Interface | RGMII signals for first TSEC; operate at 1.8 V (2.5 V tolerant) with 2-ns skew budget - must be routed as length-matched differential pairs. |
| PCI_AD[0:31] | PCI Address/Data Multiplexed Bus | 32-bit multiplexed address/data lines; require 3.3-V termination and meet PCI 2.2 setup/hold timing under 66-MHz operation with 30-pF load. |
| HRESET, SRESET | Reset Control Outputs | Open-drain reset signals with 8-mA sink capability; drive external reset supervisors or companion chips - HRESET asserts before SRESET during power-on sequence. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Security Engine | Hardware-accelerated crypto offload eliminates CPU bottlenecks in IPSec tunnel establishment, TLS record encryption, and secure boot verification - reducing latency by >90% vs. software-only implementation. |
| Dual TSEC with Jumbo Frame Support | 9.6-KB jumbo frame handling enables efficient packet forwarding in carrier-grade access nodes - reduces interrupt overhead and improves throughput in high-bandwidth traffic scenarios. |
| DDR Controller with ECC & Registered DIMM Support | Full ECC detection/correction and registered DIMM compatibility ensure memory reliability in unattended industrial deployments - prevents silent data corruption over extended MTBF requirements. |
| PCI Host/Agent Dual-Mode Operation | Configurable PCI interface allows use as root complex (host) for add-in cards or endpoint (agent) behind upstream bridges - simplifies system architecture across router, gateway, and appliance variants. |
| USB 2.0 OTG with EHCI Compliance | EHCI-compatible host mode supports high-speed peripherals (e.g., 4G modems, storage); device mode enables field firmware updates via standard USB mass storage class - no custom bootloader required. |
Applications
| Network Edge Router | Industrial IoT Gateway |
|---|---|
Use Scenario: Aggregating cellular backhaul, Wi-Fi APs, and serial field devices into a single secure IP edge node with QoS and firewalling. IC Role / Device Role / Timing Role: Primary host processor executing Linux-based routing stack, managing dual TSECs for WAN/LAN segmentation, and running crypto offload for IPsec tunnels. Use Value: Integrated DDR controller and security engine eliminate discrete memory buffers and crypto ASICs - reducing BOM cost by ~$4.20 and PCB area by 180 mm². |
Use Scenario: Connecting Modbus RTU, CAN, and RS-485 field buses to cloud platforms via TLS-secured MQTT over LTE. IC Role / Device Role / Timing Role: Real-time protocol translation engine with deterministic GPIO timing, USB host for 4G modem, and hardware RNG for TLS session key generation. Use Value: On-chip USB 2.0 OTG and crypto acceleration enable zero-touch provisioning and secure OTA updates - eliminating need for external secure element or debug interface exposure. |
| Secure Communications Appliance | Enterprise Firewall Module |
Use Scenario: Hardware-enforced encrypted voice/data gateway for government or financial sector with FIPS 140-2 Level 2 compliance requirements. IC Role / Device Role / Timing Role: Trusted execution platform with locked L1 cache, secure boot ROM, and isolated crypto channels preventing side-channel leakage between sessions. Use Value: AES-256 and SHA-256 acceleration meets FIPS throughput thresholds (>100 Mbps encrypted throughput) while maintaining deterministic latency for VoIP packet processing. |
Use Scenario: High-throughput stateful inspection module in 1U rack-mounted firewalls with multi-gigabit throughput and deep packet inspection. IC Role / Device Role / Timing Role: Packet classification accelerator interfacing with external NPU via PCI; DDR controller feeds inspection engine with flow tables and session state. Use Value: 64-bit DDR interface at 333 MHz delivers 5.3 GB/s memory bandwidth - sustaining 2.1 Gbps wire-rate inspection with <10 μs packet latency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar integrated host processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC8349EVVAGDB | Higher core frequency (up to 667 MHz same), identical pinout and peripheral set, but supports DDR2 (not DDR1) and adds SATA controller - requires board-level DDR termination redesign. | Targeted at next-gen appliances needing higher memory bandwidth and storage connectivity; not drop-in for DDR1-only designs. | Select MPC8349EVVAGDB only when migrating to DDR2 and requiring SATA; retain MPC8347EVVAGDB for DDR1 cost-optimized or legacy-compatible builds. |
| MPC8377ERVAGDB | Same e300 core, adds second PCI interface and enhanced security engine with larger crypto RAM; package is 783-pin PBGA (larger footprint, different thermal profile). | Suitable for modular chassis systems requiring dual PCI expansion or higher crypto throughput; incompatible pinout prevents PCB reuse. | Choose MPC8377ERVAGDB for scalable chassis designs with PCI expansion slots; MPC8347EVVAGDB remains optimal for compact, single-PCI edge devices. |
Compared with MPC8349EVVAGDB and MPC8377ERVAGDB, the MPC8347EVVAGDB delivers optimal balance of DDR1 memory cost, dual-gigabit Ethernet, and hardware crypto for fixed-form-factor industrial gateways - avoiding unnecessary complexity or footprint increase where DDR2 or dual-PCI are not required.
Availability
MPC8347EVVAGDB is available at Aetrix Electronics and suitable for network edge routers, industrial IoT gateways, and secure communications appliances requiring stable component supply across long-lifecycle deployments.
Supply support for MPC8347EVVAGDB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors (formerly Freescale Semiconductor) is a global leader in secure connectivity solutions for automotive, industrial, and networking markets, with deep expertise in Power Architecture™ processors and embedded security.
The MPC8347E belongs to the PowerQUICC™ II Pro family - designed specifically for cost-sensitive, power-efficient integrated host processors in carrier-class access equipment, enterprise edge devices, and secure infrastructure appliances.
FAQ
What is the maximum DDR data rate supported by the MPC8347EVVAGDB?
The MPC8347EVVAGDB supports DDR-1 SDRAM at up to 333 MHz data rate in TBGA packages (e.g., MPC8347EVVAGDB), delivering 5.3 GB/s peak bandwidth on the 64-bit interface. This is confirmed in Section 6 of the Hardware Specifications (Rev. 11, Feb 2009) and applies specifically to revision 1.1 silicon - the version embodied in the MPC8347EVVAGDB orderable part number.
Does the MPC8347EVVAGDB include hardware cryptographic acceleration?
Yes, the MPC8347EVVAGDB integrates a dedicated security engine with four crypto-channels supporting AES-128/192/256, DES/3DES, SHA-1/256, MD5, RSA-2048, and HMAC - enabling full IPSec/IKE and TLS offload without CPU involvement. This is documented in Section 1, "Overview", and Section 4, "Security Engine", of the MPC8347EEC Rev. 11 specification.
What package type and pin count does the MPC8347EVVAGDB use?
The MPC8347EVVAGDB uses a 672-ball TBGA (Thin Ball Grid Array) package with 35 mm × 35 mm body size and 1.0 mm ball pitch. Pinout details are provided in Section 18, "Package and Pin Listings", of the MPC8347E Hardware Specifications (Rev. 11), confirming signal assignments for DDR, TSEC, PCI, and USB interfaces.
Is the MPC8347EVVAGDB compatible with the MPC8349E pinout?
No, the MPC8347EVVAGDB is not pin-compatible with the MPC8349E. While both share the same 672-pin TBGA footprint, signal mappings differ significantly - particularly for DDR (DDR1 vs DDR2 I/O voltage and timing), SATA (absent in MPC8347E), and certain PCI control pins. The MPC8347EVVAGDB is functionally and physically distinct per Freescale's ordering matrix in Section 23.1.
What is the core supply voltage requirement for the MPC8347EVVAGDB?
The MPC8347EVVAGDB requires a core supply voltage of 1.2 V ± 60 mV (VDD), as specified in Table 2, "Recommended Operating Conditions", of the Hardware Specifications (Rev. 11). This tight tolerance ensures stable e300 core operation at frequencies up to 667 MHz and must be maintained independently from I/O rails (OVDD, LVDD, GVDD).
MPC8347EVVAGDB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 672-LBGA
- Series:
- MPC83xx
- Packaging:
- Tray
- Product Status:
- Obsolete
- Core Processor:
- PowerPC e300
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 400MHz
- Co-Processors/DSP:
- Security; SEC
- RAM Controllers:
- DDR
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- -
- Ethernet:
- 10/100/1000Mbps (2)
- SATA:
- -
- USB:
- USB 2.0 + PHY (2)
- Voltage - I/O:
- 2.5V, 3.3V
- Operating Temperature:
- 0°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- Cryptography, Random Number Generator
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 672-LBGA (35x35)
- Additional Interfaces:
- DUART, I2C, PCI, SPI
MPC8347EVVAGDB FAQ
1.How can I place an order for MPC8347EVVAGDB through Aetrix?
Please submit a Request for Quotation (RFQ) for MPC8347EVVAGDB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MPC8347EVVAGDB reliable?
The price and inventory of MPC8347EVVAGDB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MPC8347EVVAGDB is usually 5 days.
3.What payment methods are accepted for MPC8347EVVAGDB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MPC8347EVVAGDB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MPC8347EVVAGDB?
MPC8347EVVAGDB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MPC8347EVVAGDB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MPC8347EVVAGDB?
For technical support, including MPC8347EVVAGDB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MPC8347EVVAGDB requirements.
6.How does Aetrix verify that MPC8347EVVAGDB is sourced from the original manufacturer or authorized distributors?
All MPC8347EVVAGDB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MPC8347EVVAGDB meets industry standards.
7.What is the process for return or replacement of MPC8347EVVAGDB?
All MPC8347EVVAGDB units undergo pre-shipment inspection (PSI). If there is an issue with MPC8347EVVAGDB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MPC8347EVVAGDB part is unused and in its original packaging.
Return procedure for MPC8347EVVAGDB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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