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NXP Semiconductors MPC8347EVVAJF
- Part No.:
- MPC8347EVVAJF
- Manufacturer:
- NXP Semiconductors
- Category:
- Microprocessors
- Package:
- 672-LBGA
- Datasheet:
-
MPC8347EVVAJF.pdf
- Description:
- IC MPU MPC83XX 533MHZ 672LBGA
- Quantity:
- Payment:
- Shipping:
Inventory:4,008
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Product details
Overview
MPC8347EVVAJF from NXP (formerly Freescale) is a PowerQUICC™ II Pro integrated host processor featuring an embedded PowerPC e300 core operating up to 667 MHz, dual 10/100/1000 Mbps Ethernet controllers (TSEC), DDR SDRAM controller supporting 32-/64-bit interfaces at up to 333 MHz (TBGA), PCI 2.2-compliant 32-bit/66 MHz interface, and hardware security engine with AES-128/192/256, DES/3DES, SHA-1/256, and RSA acceleration - deployed in network edge routers, industrial gateways, and secure communications appliances.
For engineers reviewing the MPC8347EVVAJF datasheet, MPC8347EVVAJF pinout, MPC8347EVVAJF application, or MPC8347EVVAJF equivalent, this page delivers verified electrical specs (VDD = 1.2 V ±60 mV, GVDD = 2.5 V ±125 mV), thermal power data (up to 3.6 W typical in TBGA), DDR timing constraints (tDISKEW ≤750 ps @333 MHz), TSEC RGMII/RTBI interface support, and PCI host/agent mode configuration - all confirmed for revision 1.1 silicon per MPC8347EEC Rev. 11 (02/2009).
Technical Context
The MPC8347EVVAJF implements a superscalar PowerPC e300 core with 32 KB instruction and 32 KB data L1 caches (lockable portions), dynamic power management, and software compatibility across Power Architecture families. Its DDR SDRAM controller supports ECC, page mode (up to 16 open pages), and registered DIMM with SSTL2 I/O compliance.
It integrates dual TSECs compliant with IEEE 802.3z/ac/u/x standards, each with 2 KB TX/RX FIFOs, jumbo frame (9.6 KB) support, and MII/RGMII/TBI/RTBI physical layer flexibility. The security engine contains four crypto-channels with dedicated AESU, DEU, PKEU, MDEU, and RNG units - enabling concurrent IPSec/SSL/TLS offload without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Frequency | Up to 667 MHz - enables real-time packet forwarding and Linux-based routing stacks in compact embedded systems. |
| DDR Interface | 32-/64-bit, up to 333 MHz (TBGA), 2.5-V SSTL2 - supports high-bandwidth memory access for multi-service gateway applications. |
| Ethernet Controllers | Dual TSECs with RGMII/RTBI/MII - provides independent 10/100/1000 Mbps ports for WAN/LAN separation or failover redundancy. |
| PCI Interface | 32-bit, 66 MHz, PCI 2.2-compliant, host/agent mode - allows direct attachment of legacy NICs, storage controllers, or FPGA co-processors. |
| Security Engine | AES-128/192/256, SHA-1/256, RSA-2048, 4 crypto-channels - accelerates IPsec SA setup and encrypted tunnel throughput >200 Mbps line-rate. |
| Power Supply | VDD = 1.2 V ±60 mV, GVDD = 2.5 V ±125 mV, OVDD/LVDD = 3.3 V ±330 mV - requires tightly tracked, low-noise regulation for stable cache and I/O operation. |
| Thermal Dissipation | Max 3.6 W (TBGA, 533 MHz) - mandates heatsink + airflow design for sustained operation above 65°C ambient. |
Pinout & Package
The MPC8347EVVAJF is housed in a 620-pin TBGA (Thin Ball Grid Array) package with 1.0 mm ball pitch, designed for high-density PCB layouts requiring signal integrity optimization for DDR, PCI, and TSEC buses. Thermal pad on underside enables efficient heat transfer to internal ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLKIN | Main system clock input | Accepts 1–66 MHz single-ended CMOS clock; primary source for PLL when in PCI host mode. |
| PCI_SYNC_IN | PCI synchronization input | Provides reference clock for PCI agent mode; used instead of CLKIN when device operates as PCI peripheral. |
| PORESET | Power-on reset input | Active-low asynchronous reset requiring ≥32 tCLKIN assertion before clock stabilization; initiates full boot sequence. |
| HRESET | Host reset output | Open-drain active-low signal asserting downstream peripherals; negated after PLL/DLL lock (~100 μs / 122,880 csb_clk cycles). |
| MDQ[0:63] | DDR data bus (64-bit) | Bidirectional DQ lines supporting DDR-1 SDRAM; require matched trace lengths and on-die termination calibration. |
| MCK[0:1] | DDR clock outputs | Differential DDR clock pair (MCK/MCK#); 333 MHz max frequency imposes strict <±750 ps skew vs. MDQS per byte group. |
| TSEC0_TXD[0:3] | RGMII transmit data | 4-bit nibble for 1000BASE-T RGMII interface; must meet tDDKHDS ≤900 ps setup to MDQS with controlled impedance (50 Ω). |
Key Features
| Feature | Design Value |
|---|---|
| Embedded Security Engine | Four independent crypto-channels with AESU, DEU, PKEU, MDEU, and RNG - enables concurrent TLS handshake + IPsec ESP encryption without CPU load. |
| DDR SDRAM Controller | Full ECC support, programmable timing, auto-refresh, and sleep-mode self-refresh - ensures data integrity and low-power idle states in always-on gateways. |
| Dual TSEC Ethernet | IEEE 802.3z/ac/u/x compliant with 9.6 KB jumbo frames and RMON statistics - reduces interrupt overhead and enables precise traffic monitoring in managed switches. |
| PCI Host/Agent Flexibility | Configurable as PCI host bridge or PCI agent - permits use as root complex in add-in cards or as endpoint in backplane-based modular systems. |
| USB 2.0 Dual-Role Controller | EHCI-compatible host + device mode with UTMI+/ULPI PHY interface - supports field firmware updates via USB stick and diagnostic console over USB CDC ACM. |
Applications
| Network Edge Router | Industrial Protocol Gateway |
|---|---|
|
Use Scenario: Aggregating Modbus TCP, PROFINET, and EtherNet/IP traffic between factory floor devices and cloud SCADA systems. IC Role / Device Role / Timing Role: MPC8347EVVAJF acts as protocol translation engine and secure TLS tunnel endpoint, managing deterministic Ethernet timing via TSEC timestamping and local bus interfacing to fieldbus ASICs. Use Value: Hardware-accelerated SHA-256 and AES-256 enable authenticated firmware updates and encrypted data upload without degrading real-time cycle times below 1 ms. |
Use Scenario: Deployed in DIN-rail mounted gateways converting legacy RS-485 fieldbus networks to MQTT-over-TLS for IIoT platforms. IC Role / Device Role / Timing Role: MPC8347EVVAJF serves as Linux-capable application processor with DUARTs for serial bridging, GPIO for discrete I/O control, and security engine for certificate-based device identity. Use Value: Integrated 32 KB I/D caches and e300 core deliver sufficient MIPS to run lightweight MQTT broker and TLS stack while maintaining sub-100 ms latency for alarm propagation. |
| Secure Wireless Access Point | Telecom Remote Terminal Unit |
|
Use Scenario: Carrier-grade 802.11n AP with WPA3-Enterprise support, VLAN segmentation, and captive portal authentication. IC Role / Device Role / Timing Role: MPC8347EVVAJF functions as control plane processor handling 802.1X/EAP-TLS authentication, RADIUS client, and firewall policy enforcement - offloading crypto to dedicated security engine. Use Value: Four crypto-channels allow simultaneous processing of multiple EAP-TLS handshakes and IPsec tunnels, sustaining >150 concurrent authenticated clients. |
Use Scenario: Outdoor cabinet-mounted RTU collecting telemetry from substations via IEC 61850 GOOSE and reporting via LTE backhaul. IC Role / Device Role / Timing Role: MPC8347EVVAJF executes real-time IEC 61850 stack with precise time synchronization via TSEC PTP support and manages LTE modem over USB host interface. Use Value: Dual TSECs provide redundant fiber uplinks with automatic failover, while DDR controller's ECC ensures reliability during voltage sags common in unregulated grid environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar integrated host processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC8349EVRAGB | Same e300 core, higher max frequency (667 MHz), identical pinout, but supports DDR2 (not DDR1) and lacks integrated security engine. | Suitable for non-crypto-intensive networking where DDR2 bandwidth and lower power at same frequency are priorities. | Select MPC8349EVRAGB only if DDR2 memory and absence of hardware crypto acceleration are acceptable trade-offs. |
| MPC8548CVMALG | PowerPC e500v2 core, 1.33 GHz, integrated SerDes, PCIe v1.0, no TSEC - uses different architecture and lacks native 10/100/1000 Ethernet MACs. | Targets high-throughput control plane in telecom infrastructure where PCIe expansion and faster core matter more than integrated Ethernet. | Choose MPC8548CVMALG when migrating to PCIe-based I/O expansion and higher compute throughput is required, accepting external PHY dependency. |
Compared with MPC8347EVVAJF, MPC8349EVRAGB offers DDR2 support but removes hardware security acceleration, while MPC8548CVMALG delivers higher CPU performance and PCIe but eliminates integrated TSECs - making MPC8347EVVAJF uniquely balanced for cost-sensitive, crypto-aware, dual-Gigabit Ethernet edge applications.
Availability
MPC8347EVVAJF is available at Aetrix Electronics and suitable for network edge routers, industrial protocol gateways, secure wireless access points, and telecom remote terminal units requiring stable component supply across extended product lifecycles.
Supply support for MPC8347EVVAJF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors (formerly Freescale Semiconductor) is a global leader in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in Power Architecture-based processors and embedded security.
The MPC8347EVVAJF belongs to the PowerQUICC™ II Pro family, engineered specifically for cost-optimized, secure, multi-protocol networking in space-constrained edge infrastructure - emphasizing integrated Ethernet, DDR memory control, and hardware-accelerated cryptography.
FAQ
What is the maximum DDR data rate supported by the MPC8347EVVAJF?
The MPC8347EVVAJF supports DDR-1 SDRAM at up to 333 MHz data rate in the TBGA package variant, delivering 5.3 GB/s peak bandwidth on the 64-bit interface. This is confirmed in Section 6 of the MPC8347EEC Rev. 11 specification for revision 1.1 silicon. The PBGA variant is limited to 266 MHz. MPC8347EVVAJF requires 2.5-V SSTL2 I/O compliance and supports ECC, page mode, and registered DIMMs - all critical for reliable operation in carrier-grade edge equipment.
Does the MPC8347EVVAJF include hardware cryptographic acceleration?
Yes, the MPC8347EVVAJF integrates a dedicated security engine with four crypto-channels and execution units for AES-128/192/256, DES/3DES, SHA-1/256, MD5, RSA-2048, and RC4. This engine operates independently of the e300 core and enables line-rate IPsec and TLS offload. The MPC8347EVVAJF security block is explicitly documented in Sections 1.1 and 4 of the MPC8347EEC Rev. 11 datasheet, confirming full support for IPSec, SSL/TLS, and IEEE 802.11i protocols.
What are the key differences between MPC8347EVVAJF and MPC8349E?
The MPC8347EVVAJF and MPC8349E share the same e300 core and pinout but differ in memory support and security features: MPC8347EVVAJF supports DDR-1 only and includes a full hardware security engine, whereas MPC8349E adds DDR2 support but omits the security engine. Both operate up to 667 MHz. MPC8347EVVAJF remains optimal for DDR1-based, crypto-intensive designs where cost and proven silicon revision (1.1) are prioritized over newer memory standards.
Which Ethernet physical interfaces does the MPC8347EVVAJF TSEC support?
The MPC8347EVVAJF dual TSECs support MII (10/100 Mbps), GMII/RGMII (1000 Mbps), and TBI/RTBI (1000 Mbps) interfaces per IEEE 802.3z/ac/u/x standards. RGMII and RTBI modes are explicitly validated for 1000BASE-T operation with tight timing constraints (e.g., tDDKHDS ≤900 ps). These interfaces are detailed in Section 8 of the MPC8347EEC Rev. 11 datasheet and enable flexible PHY selection - including low-pin-count ULPI-connected transceivers for space-constrained designs.
Is the MPC8347EVVAJF compatible with PCI Express?
No, the MPC8347EVVAJF implements a PCI 2.2-compliant parallel bus interface (32-bit, 66 MHz), not PCI Express. It supports both host bridge and agent modes but lacks PCIe SerDes, transaction layer, or link training logic. For PCIe capability, designers must select later-generation NXP processors such as the MPC8548 or QorIQ series. The MPC8347EVVAJF PCI interface is fully documented in Section 13 of MPC8347EEC Rev. 11, including arbitration, address translation, and parity support.
MPC8347EVVAJF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 672-LBGA
- Series:
- MPC83xx
- Packaging:
- Tray
- Product Status:
- Obsolete
- Core Processor:
- PowerPC e300
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 533MHz
- Co-Processors/DSP:
- Security; SEC
- RAM Controllers:
- DDR
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- -
- Ethernet:
- 10/100/1000Mbps (2)
- SATA:
- -
- USB:
- USB 2.0 + PHY (2)
- Voltage - I/O:
- 2.5V, 3.3V
- Operating Temperature:
- 0°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- Cryptography, Random Number Generator
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 672-LBGA (35x35)
- Additional Interfaces:
- DUART, I2C, PCI, SPI
MPC8347EVVAJF FAQ
1.How can I place an order for MPC8347EVVAJF through Aetrix?
Please submit a Request for Quotation (RFQ) for MPC8347EVVAJF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MPC8347EVVAJF reliable?
The price and inventory of MPC8347EVVAJF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MPC8347EVVAJF is usually 5 days.
3.What payment methods are accepted for MPC8347EVVAJF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MPC8347EVVAJF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MPC8347EVVAJF?
MPC8347EVVAJF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MPC8347EVVAJF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MPC8347EVVAJF?
For technical support, including MPC8347EVVAJF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MPC8347EVVAJF requirements.
6.How does Aetrix verify that MPC8347EVVAJF is sourced from the original manufacturer or authorized distributors?
All MPC8347EVVAJF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MPC8347EVVAJF meets industry standards.
7.What is the process for return or replacement of MPC8347EVVAJF?
All MPC8347EVVAJF units undergo pre-shipment inspection (PSI). If there is an issue with MPC8347EVVAJF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MPC8347EVVAJF part is unused and in its original packaging.
Return procedure for MPC8347EVVAJF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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