NXP Semiconductors MPC8347EZQAGDB

Overview

MPC8347EZQAGDB from Freescale Semiconductor is a PowerQUICC™ II Pro integrated host processor featuring an embedded PowerPC e300 core operating up to 667 MHz, dual 10/100/1000 Mbps Ethernet controllers (TSECs), DDR SDRAM controller supporting 32-/64-bit interfaces at up to 333 MHz (TBGA), PCI 2.2-compliant 32-bit/66 MHz interface, and hardware security engine with AES-128/192/256, DES/3DES, SHA-1/256, and RSA acceleration - deployed in enterprise edge routers and industrial gateways requiring deterministic real-time packet processing and secure boot.

For engineers reviewing the MPC8347EZQAGDB datasheet, MPC8347EZQAGDB pinout, MPC8347EZQAGDB application, or MPC8347EZQAGDB equivalent, this page delivers verified silicon revision 1.1 specifications, confirmed TBGA-783 package mapping, validated DDR/PCI/Ethernet timing compliance, and two field-proven alternative processors for migration paths in networking infrastructure designs.

Technical Context

The MPC8347EZQAGDB implements a superscalar PowerPC e300 core with 32 KB instruction and 32 KB data L1 caches (lockable portions), dynamic power management, and software compatibility across Power Architecture™ families. Its DDR SDRAM controller supports programmable timing for DDR-1, four banks up to 1 Gbyte each, full ECC, and registered DIMM support with 2.5-V SSTL2 I/O.

Two TSECs comply with IEEE 802.3/802.3u/802.3z standards, offering GMII/RGMII/TBI/RTBI physical interfaces, 9.6-Kbyte jumbo frame handling, RMON statistics, and 2-Kbyte TX/RX FIFOs per channel. The security engine integrates four crypto-channels with dedicated execution units for AES, DES/3DES, SHA/MD5, RSA, and RC4, enabling concurrent IPSec/SSL/TLS offload.

Key Specifications

Pinout & Package

TBGA-783 package with 27 mm × 27 mm body, 1.0 mm ball pitch, and standard JEDEC MO-251AC mechanical outline. Thermal pad on underside requires solder paste stencil design per Freescale AN2912 guidelines.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar integrated host processor applications.

Compared with MPC8347EZQAGDB, MPC8349EVRAGDB trades security acceleration for higher clock speed and DDR2 bandwidth, while MPC8548CZQAGD shifts to a more scalable but architecturally divergent platform requiring new PHY integration and PCIe infrastructure - making MPC8347EZQAGDB optimal for cost-sensitive, crypto-heavy, TSEC-based edge deployments.

Availability

MPC8347EZQAGDB is available at Aetrix Electronics and suitable for enterprise edge routers, industrial protocol gateways, secure wireless access points, and network attached storage controllers requiring stable component supply and long-term lifecycle support.

Supply support for MPC8347EZQAGDB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Freescale Semiconductor (now part of NXP Semiconductors since 2015) was a fabless semiconductor company specializing in embedded processors, analog, and connectivity solutions for automotive, industrial, and networking markets.

The MPC8347EZQAGDB belongs to the PowerQUICC™ II Pro family, designed specifically for cost-optimized, secure, and feature-rich communications infrastructure - targeting edge routing, gateway, and control-plane applications where integrated TSECs, DDR, PCI, and hardware crypto deliver balanced performance and integration.

FAQ

What is the confirmed package type and pin count for MPC8347EZQAGDB?

The MPC8347EZQAGDB is packaged in a TBGA-783 (27 mm × 27 mm, 1.0 mm pitch) with 783 I/O balls. This matches Freescale's documented MO-251AC mechanical outline and is distinct from the PBGA-783 variant used in lower-speed MPC8347E derivatives. Pin assignments are fully defined in Section 18 of the MPC8347EEC Rev. 11 specification.

Does MPC8347EZQAGDB support DDR2 memory?

No, MPC8347EZQAGDB supports only DDR-1 SDRAM. Its DDR controller is specified for DDR-1 timings, 2.5-V SSTL2 I/O, and 333 MHz maximum data rate (TBGA). DDR2 support was introduced in later PowerQUICC II Pro variants like MPC8349E, which require different VDDQ and termination schemes incompatible with MPC8347EZQAGDB.

What silicon revision does MPC8347EZQAGDB correspond to?

MPC8347EZQAGDB corresponds to revision 1.1 silicon, as confirmed by Freescale's ordering information and errata documentation. Revision 3.0 and later (denoted by suffix 'A' or 'B' in part numbers like MPC8347EA) introduced DDR2 support and updated security engine features - these are not applicable to MPC8347EZQAGDB.

Can MPC8347EZQAGDB operate in PCI host mode with full 66 MHz timing compliance?

Yes, MPC8347EZQAGDB supports PCI Specification Rev. 2.2 in host mode at 32-bit/66 MHz with full timing compliance. Its PCI interface meets tSU/tH requirements for address/data setup/hold, supports parity, and implements posting and prefetching - verified in Table 4 and Section 13 of the MPC8347EEC Rev. 11 specification.

Is hardware-based SHA-256 supported in the MPC8347EZQAGDB security engine?

Yes, the MPC8347EZQAGDB security engine includes a Message Digest Execution Unit (MDEU) that natively supports SHA-256 (256-bit message digest), SHA-1 (160-bit), and MD5 (128-bit) with HMAC capability. This is confirmed in Section 1, "Overview", and Section 4.3.4 of the MPC8347EEC Rev. 11 specification.