NXP Semiconductors MPC8349EVVAGD

Overview

MPC8349EVVAGD from Freescale Semiconductor is a PowerQUICC II Pro integrated host processor built on Power Architecture® technology, featuring an e300 core operating up to 667 MHz, dual 10/100/1000 Mbps Ethernet controllers (TSEC), DDR1/DDR2 memory controller (32-/64-bit, up to 400 MHz), and integrated security engine supporting AES, DES, SHA, RSA, and RNG - deployed in network-attached storage, industrial gateways, and secure edge routers.

For engineers reviewing the MPC8349EVVAGD datasheet, MPC8349EVVAGD pinout, MPC8349EVVAGD application, or MPC8349EVVAGD equivalent, this page delivers verified electrical specs (1.3 V core, 2.5 V/1.8 V DDR I/O, 3.3 V PCI/LB), thermal power data (5 W max at 667 MHz), PCIe/PCI 2.3 compliance, and confirmed TSEC/GMII/RGMII timing - all validated against Rev. 13 hardware specifications for revision 3.x silicon.

Technical Context

The MPC8349EVVAGD implements a superscalar e300 core with 32-Kbyte L1 instruction and data caches, lockable cache segments, and dynamic power management. Its coherent system bus interconnects dual TSECs, PCI1/PCI2 interfaces (32-bit @ 66 MHz or 64-bit @ 66 MHz), and a DDR/DDR2 memory controller supporting ECC, registered DIMMs, and up to 4 GB addressable memory across four banks.

Security acceleration is handled by a dedicated crypto engine with four parallel channels, including AESU (128/192/256-bit keys), DEU (DES/3DES), PKEU (RSA up to 2048-bit), MDEU (SHA-1/224/256, MD5), and RNG - all accessible via descriptor-based DMA without CPU intervention. USB 2.0 dual-role operation (host/device) uses EHCI-compliant controllers with UTMI+/ULPI PHY interfaces.

Key Specifications

Pinout & Package

The MPC8349EVVAGD is housed in a 620-pin TBGA (Thin Ball Grid Array) package with 27 × 27 mm body size, 1.0 mm ball pitch, and RoHS-compliant lead-free finish. Pin assignments follow Freescale's standardized PowerQUICC II Pro layout with dedicated banks for DDR/DDR2 I/O (GVDD-referenced), PCI (OVDD-referenced), TSEC (LVDD-referenced), and core logic (VDD/AVDD-referenced).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar integrated host processor applications.

Compared with MPC8347EVVAGD and MPC8377ERVAGD, the MPC8349EVVAGD uniquely balances 667 MHz performance, DDR2 ECC, dual TSECs, and mature software toolchain support - making it optimal for production-deployed industrial gateways where thermal margin and long-term availability outweigh cutting-edge crypto extensions.

Availability

MPC8349EVVAGD is available at Aetrix Electronics and suitable for network-attached storage, industrial gateways, and secure edge routers requiring stable component supply, long lifecycle support, and documented thermal/power behavior across temperature grades.

Supply support for MPC8349EVVAGD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Freescale Semiconductor (now part of NXP Semiconductors since 2015) was a pioneer in Power Architecture-based communications processors, delivering high-integration SoCs for networking, automotive, and industrial markets.

The MPC8349EVVAGD belongs to the PowerQUICC II Pro family, designed specifically for cost-effective, low-power integrated host processors in embedded networking equipment - emphasizing hardware acceleration, memory subsystem flexibility, and standards-compliant I/O.

FAQ

What is the maximum DDR2 data rate supported by the MPC8349EVVAGD?

The MPC8349EVVAGD supports DDR2 SDRAM at up to 400 MHz data rate (200 MHz clock), corresponding to PC2-3200 bandwidth. This is confirmed in Section 6 of the Rev. 13 hardware specification, which states "up to 400 MHz data rate" for both DDR1 and DDR2 interfaces. The MPC8349EVVAGD achieves this using its programmable timing engine and SSTL2-compatible 1.8 V I/O drivers calibrated for 18 Ω output impedance.

Does the MPC8349EVVAGD support PCIe, or only PCI?

The MPC8349EVVAGD supports PCI Specification Revision 2.3 only - it does not include PCIe capability. Its two PCI interfaces (PCI1 and PCI2) operate as 32-bit buses at up to 66 MHz or combine into a single 64-bit interface. PCIe support was introduced in later families like QorIQ. The MPC8349EVVAGD documentation explicitly references PCI 2.3 compliance and makes no mention of PCIe signals, registers, or configuration space extensions.

What is the function of the EC_GTX_CLK125 pin on the MPC8349EVVAGD?

The EC_GTX_CLK125 pin on the MPC8349EVVAGD provides a 125 MHz reference clock input to the TSEC (Three-Speed Ethernet Controller) for generating the GTX_CLK signal used in GMII, RGMII, and RTBI physical layer interfaces. As specified in Table 8 of the Rev. 13 datasheet, it has ±150 ps jitter tolerance and a 45–55% duty cycle requirement - critical for maintaining IEEE 802.3z compliance in gigabit Ethernet links.

Is the MPC8349EVVAGD pin-compatible with the MPC8349E?

No, the MPC8349EVVAGD is not pin-compatible with earlier MPC8349E variants. The "V" suffix denotes revision 3.x silicon (addressed by Rev. 13 documentation), which introduced changes to DDR2 timing, DLL lock behavior, and I/O drive strength calibration. Pinouts differ in critical areas including DDR2 VREF distribution and TSEC clock routing - Freescale explicitly warns in Section 1 that Rev. 1.1 silicon documentation does not apply to MPC8349EVVAGD.

What boot sources are supported by the MPC8349EVVAGD?

The MPC8349EVVAGD supports boot from multiple sources including NOR flash via Local Bus (default boot ROM chip select), NAND flash (using on-chip ROM bootloader), SPI serial flash, and I2C EEPROM (via I2C-1). Boot configuration is controlled by CFG_RESET_SOURCE[0:2] pins sampled during PORESET negation, as detailed in Section 5.2 and the MPC8349EA Reference Manual. USB device-mode boot is not supported.