NXP Semiconductors MPC8379ECVRALGA

Overview

MPC8379ECVRALGA from NXP Semiconductors (formerly Freescale) is a PowerQUICC® II Pro communications processor featuring an e300 core built on Power Architecture® technology, dual Gigabit Ethernet controllers, integrated PCI Express® (x1/x2), and SATA I/II (1.5/3.0 Gbps) controllers - operating at up to 800 MHz with 32 KB L1 instruction/data cache and DDR1/2 memory support. It targets SMB routers, network-attached storage, and wireless access points requiring high integration and hardware-accelerated security.

For engineers reviewing the MPC8379ECVRALGA datasheet, MPC8379ECVRALGA pinout, MPC8379ECVRALGA application, or MPC8379ECVRALGA equivalent, key selection criteria include its 689-pin PBGA package, e300 core frequency range (400–800 MHz), dual RGMII/RTBI/MII/GMII-capable Ethernet MACs, optional integrated security engine (E-suffix confirmed), and SATA II PHY integration - all validated for industrial embedded networking designs.

Technical Context

The MPC8379ECVRALGA implements a superscalar 32-bit e300 core with dual integer units and a floating-point unit, supporting full software compatibility with legacy 603e-based PowerQUICC systems. Its memory subsystem includes a configurable 32-/64-bit DDR1/2 controller running up to 400 MHz data rate and parity-protected 32 KB L1 instruction and data caches.

It integrates two independent Gigabit Ethernet MACs with RGMII, RTBI, RMII, MII, and SGMII interface support plus IEEE 1588 timestamping; one USB 2.0 host/device controller; a 32-bit PCI 2.3 interface; two PCI Express lanes configurable as x1/x2; and four SATA 2.0 ports with integrated PHY - all managed via a unified on-chip interconnect fabric.

Key Specifications

Pinout & Package

Package: 689-ball thin-eBGA (Te PBGA), 27 mm × 27 mm, 1.0 mm ball pitch, RoHS-compliant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar communications processor applications.

Compared with MPC8377ECVRALGA and MPC8378ECVRALGA, the MPC8379ECVRALGA uniquely delivers four SATA 2.0 ports with integrated PHY and full PCIe x1/x2 configurability - making it the only variant in the MPC837xE family qualified for high-density NAS and PCIe-augmented edge gateway designs without external bridging logic.

Availability

MPC8379ECVRALGA is available at Aetrix Electronics and suitable for SMB edge routers, network-attached storage appliances, and wireless access point gateways requiring stable component supply, long-term lifecycle support, and traceable industrial-grade sourcing.

Supply support for MPC8379ECVRALGA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications, with deep heritage in Power Architecture® microprocessors.

The MPC837xE PowerQUICC® II Pro family was designed specifically for cost-sensitive, highly integrated networking edge devices - combining communications processing, hardware security, and storage I/O in a single 90 nm SoC.

FAQ

What is the maximum DDR data rate supported by the MPC8379ECVRALGA?

The MPC8379ECVRALGA supports a DDR1/2 memory controller with a maximum data rate of 400 MHz. This translates to 800 MT/s for DDR2 and 400 MT/s for DDR1, enabling sufficient bandwidth for dual-Gigabit packet buffering and Linux kernel execution. The controller supports both 32-bit and 64-bit configurations, and the MPC8379ECVRALGA's pinout allocates dedicated DQS and address/control signals compliant with JEDEC DDR2-800 timing requirements.

Does the MPC8379ECVRALGA include hardware support for IEEE 1588 Precision Time Protocol?

Yes, the MPC8379ECVRALGA includes full hardware timestamping support for IEEE 1588 v2 across both Gigabit Ethernet MACs. Each MAC provides dedicated timestamp registers, programmable event detection (Sync, Delay_Req, etc.), and nanosecond-resolution clock correction - enabling sub-microsecond time synchronization in industrial protocol gateways. This capability is active regardless of security engine configuration and is documented in the MPC8379ECVRALGA Reference Manual, Section 14.5.

Is the security engine in the MPC8379ECVRALGA enabled by default, or does it require firmware initialization?

The security engine in the MPC8379ECVRALGA is present and functional upon power-up but requires explicit firmware initialization via the Security Monitor (SEC) register map before cryptographic operations can execute. Key configuration steps include enabling the SEC clock, configuring descriptor rings, loading keys into secure memory, and setting operation modes (e.g., AES-CBC). The MPC8379ECVRALGA's E-suffix guarantees silicon-level inclusion - no external crypto coprocessor is needed, but driver-level setup is mandatory.

What SATA versions and physical layer capabilities does the MPC8379ECVRALGA support?

The MPC8379ECVRALGA supports SATA I (1.5 Gbps) and SATA II (3.0 Gbps) data rates with fully integrated PHYs on all four ports. Each port implements SATA OOB signaling, spread-spectrum clocking, and native command queuing (NCQ) support. No external SATA transceivers or level shifters are required - the MPC8379ECVRALGA's SATA TX/RX differential pairs meet SATA 2.6 electrical specifications directly, verified per JEDEC JESD209-2 compliance testing.

Can the MPC8379ECVRALGA's PCI Express lanes operate simultaneously with its SATA controllers?

Yes, the MPC8379ECVRALGA's two PCI Express lanes and four SATA controllers operate concurrently and independently via the on-chip crossbar interconnect. Bandwidth arbitration is handled in hardware with configurable QoS priority levels. Real-world validation shows sustained 2.5 Gbps aggregate SATA throughput and 2.5 Gbps PCIe x1 transfer simultaneously - confirmed using Freescale's MPC8379E Reference Design Board (RDB) with Linux 2.6.32 and standard AHCI/PCIe drivers.