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NXP Semiconductors MPC859TZP133A
- Part No.:
- MPC859TZP133A
- Manufacturer:
- NXP Semiconductors
- Category:
- Microprocessors
- Package:
- 357-BBGA
- Datasheet:
-
MPC859TZP133A.pdf
- Description:
- IC MPU MPC8XX 133MHZ 357BGA
- Quantity:
- Payment:
- Shipping:
Inventory:1,230
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Product details
Overview
MPC859TZP133A from Freescale Semiconductor is a PowerQUICC™ II-compatible 32-bit communications processor with integrated PowerPC core, CPM, and Fast Ethernet controller. It operates at 133 MHz CPU frequency, features 4-Kbyte instruction and 4-Kbyte data caches, supports 10/100Base-T MII and UTOPIA Level 2 interfaces, and targets ATM edge node and DSL access concentrator applications.
For engineers reviewing the MPC859TZP133A datasheet, MPC859TZP133A pinout, MPC859TZP133A application, or MPC859TZP133A equivalent, key selection criteria include its single SCC (Ethernet-only), dual SMC support, 1.8 V core / 3.3 V I/O operation, 357-pin PBGA package, and ESAR-enhanced ATM OAM/PM functionality.
Technical Context
The MPC859TZP133A integrates a single-issue PowerPC core with MMU, SIU, and CPM modules interconnected via 32-bit internal buses. Its CPM includes a 32-bit RISC controller, 8-Kbyte dual-port RAM, and 10 SDMA channels for serial peripheral offload.
It implements enhanced SAR (ESAR) mode with OAM performance monitoring, multi-PHY UTOPIA Level 2 support, AAL2/VBR ROM-resident firmware, and simultaneous MII/UTOPIA operation-enabling hardware-accelerated ATM cell processing without external microcode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Frequency | 133 MHz - Enables real-time ATM cell processing and protocol handling in DSL access equipment. |
| Core Voltage | 1.7–1.9 V - Requires tightly regulated low-noise 1.8 V supply; differential tolerance ≤100 mV vs. VDDSYN. |
| I/O Voltage | 3.135–3.465 V - Supports 3.3 V logic with 5-V tolerant pins (PA[0:15], PB[14:31], etc.) for legacy interface compatibility. |
| Cache Configuration | 4-Kbyte instruction + 4-Kbyte data cache - Two-way set-associative with LRU replacement; lockable per 128-bit block. |
| Memory Controller | 8-bank DRAM controller - Supports EDO/SDRAM/SRAM/Flash with up to 30 wait states per bank and glueless interfacing. |
| FEC Interface | MII + UTOPIA Level 2 - Simultaneous 10/100Base-T and half-duplex UTOPIA; FIFO buffering reduces cell transmission latency. |
| Thermal Limit | Junction temperature max 95 °C (standard) - Requires thermal design using RθJB = 13 °C/W on 2s2p PCB with vias to ground plane. |
Pinout & Package
Package: 357-pin plastic ball grid array (PBGA), 27 mm × 27 mm, 1.27 mm pitch, thermally enhanced with exposed die pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDL | Core power supply | 1.8 V supply for PowerPC core and CPM; must ramp before/with VDDH and stay within ±100 mV of VDDSYN. |
| VDDH | I/O power supply | 3.3 V supply for all digital I/O including MII, UTOPIA, and address/data bus; powers 5-V tolerant buffers. |
| VDDSYN | PLL power supply | 1.8 V dedicated supply for clock synthesizer; noise sensitivity requires separate low-ESR decoupling. |
| EXTAL | Crystal oscillator input | Accepts 10–50 MHz fundamental-mode crystal; drives on-chip PLL to generate 133 MHz core clock. |
| MII_TXD[0:3] | MII transmit data | 4-bit parallel output for 10/100Base-T PHY; timing referenced to MII_TXCLK with setup/hold per Table 9. |
| UTOPIA_DA[0:7] | UTOPIA data bus | 8-bit bidirectional cell data path in UTOPIA Level 2 mode; supports master/slave operation with split-bus capability. |
| SCC1_TXD / PA14 | Ethernet MAC transmit | Dedicated UART/HDLC/Ethernet TX pin; configured as MII TXD[0] when FEC is enabled; 5-V tolerant. |
Key Features
| Feature | Design Value |
|---|---|
| ESAR-enhanced ATM engine | Hardware OAM cell generation/processing and PM counters eliminate host CPU overhead for DSLAM OAM functions. |
| ROM-resident AAL2/VBR | Preloaded ATM adaptation layer firmware enables immediate VBR service activation without external boot code. |
| Single SCC (SCC1) | Configurable for Ethernet (MII), HDLC, or ATM; no SCC2–4 - simplifies layout and reduces BOM count in cost-sensitive DSL nodes. |
| Dual SMC support | SMC1 (UART only on MPC859DSL) and SMC2 enable concurrent management interfaces (e.g., CLI over RS-232 + GCI to line card). |
| IEEE 1149.1 JTAG | Full boundary-scan test access for production validation and in-system debug; supports advanced on-chip emulation mode. |
Applications
| DSL Access Concentrator | ATM Edge Node |
|---|---|
Use Scenario: Aggregates multiple ADSL lines into a single ATM uplink for broadband service delivery. IC Role / Device Role / Timing Role: Primary communications processor executing PPPoE termination, ATM segmentation/reassembly, and QoS policing. Use Value: Integrated ESAR and ROM-based AAL2 reduce external memory requirements and accelerate time-to-market for carrier-grade DSLAMs. |
Use Scenario: Provides traffic shaping, OAM monitoring, and cell relay between metro Ethernet and core ATM networks. IC Role / Device Role / Timing Role: Real-time ATM switch fabric controller with hardware-accelerated cell forwarding and PM counter accumulation. Use Value: On-chip OAM/PM support enables continuous SLA verification without host intervention, reducing operational overhead. |
| Residential Gateway | Industrial Protocol Converter |
Use Scenario: Bridges IP traffic between home LAN and ISP's ATM backbone using RFC 1483 bridging. IC Role / Device Role / Timing Role: Dual-role processor: PowerPC core handles TCP/IP stack while CPM manages ATM encapsulation and FEC. Use Value: Single-chip integration eliminates external ASICs, lowering bill-of-materials cost and board area in space-constrained gateways. |
Use Scenario: Translates Modbus RTU over RS-485 to ATM cells for SCADA backhaul across legacy telecom infrastructure. IC Role / Device Role / Timing Role: Protocol gateway controller using SMC1 for serial Modbus and FEC for ATM transport. Use Value: Hardware UART and HDLC support ensures deterministic latency for industrial control loops (<10 ms end-to-end). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar communications processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC859TZQ133B | Same core, identical cache and peripheral set; differs only in qualification grade (industrial temp −40°C to +100°C vs. standard 0°C to +95°C). | Required for outdoor DSLAM cabinets or uncontrolled industrial environments where extended temperature operation is mandatory. | Select MPC859TZQ133B when ambient operating temperature exceeds 95°C junction limit or when extended temp qualification is specified in system safety plan. |
| MPC866TZP133C | Includes four SCCs (vs. one), TSA, and PCMCIA interface; shares same 133 MHz speed, 4-KB caches, and 357-pin PBGA footprint. | Suitable for multi-service access routers requiring concurrent T1/E1, Ethernet, and modem interfaces - not just ATM/DSL. | Choose MPC866TZP133C if future expansion to multi-protocol services (e.g., TDM + Ethernet + ATM) is planned; pinout compatible but requires updated firmware. |
Compared with MPC859TZP133A, MPC859TZQ133B offers extended thermal reliability without functional change, while MPC866TZP133C adds scalable serial connectivity at the cost of higher power and software complexity - making MPC859TZP133A optimal for fixed-function, cost-sensitive DSL edge deployments.
Availability
MPC859TZP133A is available at Aetrix Electronics and suitable for DSL access concentrators, ATM edge nodes, residential gateways, and industrial protocol converters requiring stable component supply across long-life telecommunications programs.
Supply support for MPC859TZP133A includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Freescale Semiconductor (now part of NXP Semiconductors) is a fabless semiconductor company specializing in embedded processors, analog, and connectivity solutions for automotive, industrial, and networking markets.
The MPC859TZP133A belongs to the PowerQUICC™ II family, designed specifically for cost-optimized, low-power ATM and DSL access infrastructure requiring integrated communications processing without external co-processors.
FAQ
What is the maximum operating junction temperature for MPC859TZP133A?
The MPC859TZP133A has a maximum junction temperature of 95 °C under standard operating conditions. This rating assumes proper thermal design using the junction-to-board thermal resistance (RθJB = 13 °C/W) on a 2s2p PCB with thermal vias. Exceeding this limit risks permanent degradation of the PowerPC core's timing margins and CPM DMA reliability. Always validate thermal performance with ΨJT-based measurements during prototype testing of MPC859TZP133A.
Does MPC859TZP133A support full-duplex UTOPIA Level 2 operation?
Yes, MPC859TZP133A supports full-duplex UTOPIA Level 2 in both master (ATM side) and slave (PHY side) modes using its split-bus architecture. This capability is enabled by dedicated UTOPIA control signals (UTOPIA_CLK, UTOPIA_FS, UTOPIA_OE) and 8-bit bidirectional data bus (UTOPIA_DA[0:7]). The feature allows simultaneous cell transmission and reception without external FIFOs, directly supporting OC-3/STM-1 PHY interfaces in MPC859TZP133A-based designs.
How many serial communication controllers does MPC859TZP133A include?
MPC859TZP133A includes exactly one Serial Communication Controller (SCC1), which is dedicated to Ethernet functionality when the Fast Ethernet Controller is enabled. Unlike the MPC866 variant, it does not support SCC2–4 or Time Slot Assigner (TSA). SCC1 can be configured for HDLC, UART, or ATM modes, but in MPC859TZP133A implementations, it is typically used for MII-based 10/100Base-T Ethernet bridging.
What is the purpose of the VDDSYN supply pin on MPC859TZP133A?
The VDDSYN pin supplies 1.8 V to the on-chip clock synthesizer (PLL), which generates the 133 MHz core clock from the EXTAL input. This supply must be independently decoupled with low-ESR capacitors because PLL phase noise directly impacts CPM timing accuracy and FEC jitter performance. The voltage difference between VDDSYN and VDDL must not exceed 100 mV at any time - a requirement strictly enforced in MPC859TZP133A power sequencing to prevent ESD diode conduction.
Can MPC859TZP133A execute AAL2 and VBR functions without external firmware?
Yes, MPC859TZP133A includes ROM-resident AAL2 and VBR (Variable Bit Rate) adaptation layer firmware. This eliminates the need for external boot ROM or flash-based microcode loading, enabling immediate ATM service activation after reset. The ROM implementation is fixed and validated for RFC 2680-compliant cell relay - a key differentiator from earlier MPC860 derivatives and a confirmed capability of MPC859TZP133A per Freescale Hardware Specifications Rev. 2.
MPC859TZP133A Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 357-BBGA
- Series:
- MPC8xx
- Packaging:
- Tray
- Product Status:
- Obsolete
- Core Processor:
- MPC8xx
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 133MHz
- Co-Processors/DSP:
- Communications; CPM
- RAM Controllers:
- DRAM
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- -
- Ethernet:
- 10Mbps (1), 10/100Mbps (1)
- SATA:
- -
- USB:
- -
- Voltage - I/O:
- 3.3V
- Operating Temperature:
- 0°C ~ 95°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 357-PBGA (25x25)
- Additional Interfaces:
- HDLC/SDLC, I2C, IrDA, PCMCIA, SPI, TDM, UART/USART
MPC859TZP133A FAQ
1.How can I place an order for MPC859TZP133A through Aetrix?
Please submit a Request for Quotation (RFQ) for MPC859TZP133A on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MPC859TZP133A reliable?
The price and inventory of MPC859TZP133A are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MPC859TZP133A is usually 5 days.
3.What payment methods are accepted for MPC859TZP133A?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MPC859TZP133A transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MPC859TZP133A?
MPC859TZP133A orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MPC859TZP133A order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MPC859TZP133A?
For technical support, including MPC859TZP133A datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MPC859TZP133A requirements.
6.How does Aetrix verify that MPC859TZP133A is sourced from the original manufacturer or authorized distributors?
All MPC859TZP133A products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MPC859TZP133A meets industry standards.
7.What is the process for return or replacement of MPC859TZP133A?
All MPC859TZP133A units undergo pre-shipment inspection (PSI). If there is an issue with MPC859TZP133A, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MPC859TZP133A part is unused and in its original packaging.
Return procedure for MPC859TZP133A:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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