NXP Semiconductors MPC870CVR133

Overview

MPC870CVR133 from Freescale Semiconductor is a 32-bit Power Architecture™ microprocessor with integrated communications processor module (CPM), dual 10/100 Mbps Fast Ethernet controllers, USB 2.0 host/function interface, and 8-Kbyte instruction/data caches - operating at 133 MHz core frequency in 2:1 bus mode for networking edge routers and industrial gateways.

For engineers reviewing the MPC870CVR133 datasheet, MPC870CVR133 pinout, MPC870CVR133 application, or MPC870CVR133 equivalent, key selection criteria include its 133-MHz MPC8xx core, dual FEC with MII/RMII support, 1.8-V core / 3.3-V I/O voltage domains, PBGA-256 package, and absence of security engine - distinguishing it from MPC875 variants.

Technical Context

The MPC870CVR133 implements a single-issue 32-bit RISC core with MMU, two-way set-associative 8-Kbyte instruction and data caches, and 32-entry fully associative TLBs supporting 4/16/512 Kbyte and 8 Mbyte page sizes. Its CPM includes 8-Kbyte dual-port RAM, four baud-rate generators, and serial DMA channels for SCC/SMC offload.

It integrates a System Integration Unit (SIU) with clock synthesizer, periodic interrupt timer, software watchdog, IEEE 1149.1 JTAG debug interface, and memory controller supporting DRAM, SRAM, Flash, and EPROM across eight banks - with programmable wait states, dynamic bus sizing (8/16/32-bit), and boot chip-select options.

Key Specifications

Pinout & Package

The MPC870CVR133 is housed in a 256-ball plastic ball grid array (PBGA) package with 1.27-mm ball pitch, designed for four-layer PCBs with dedicated power/ground planes and strict decoupling requirements (minimum four 0.1-µF capacitors near package edges).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar communications processor applications.

Compared with MPC875CVR133, MPC870CVR133 removes security and TSA functions to reduce cost and power; compared with MPC885CZQ133, it retains PBGA-256 pinout and PowerQUICC II software compatibility but lacks DDR/PCI - making it ideal for incremental upgrades in legacy industrial networking hardware.

Availability

MPC870CVR133 is available at Aetrix Electronics and suitable for industrial protocol gateways, network edge routers, USB field service terminals, and legacy fieldbus interface modules requiring stable component supply and long-term lifecycle support.

Supply support for MPC870CVR133 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Freescale Semiconductor (now part of NXP Semiconductors) is a fabless semiconductor company specializing in embedded processing, connectivity, and analog solutions for automotive, industrial, and networking markets.

The MPC870CVR133 belongs to the PowerQUICC II family - designed specifically for cost-optimized, integrated communications processors targeting industrial control, telecom access equipment, and embedded networking applications.

FAQ

What is the maximum operating frequency of the MPC870CVR133 core?

The MPC870CVR133 core operates at a maximum frequency of 133 MHz, but only in 2:1 bus mode where the core runs at twice the external bus speed. In 1:1 mode, the maximum supported core frequency is 80 MHz. This constraint is enforced by internal clock divider architecture and documented in the MPC875/MPC870 Hardware Specifications Rev. 4, Section 2.

Does the MPC870CVR133 include a hardware security engine?

No, the MPC870CVR133 does not include a hardware security engine. Unlike the MPC875CVR133 variant, the MPC870CVR133 omits the crypto-channel, AESU, DEU, and MDEU blocks. This distinction is explicitly confirmed in Table 1 of the MPC875/MPC870 Hardware Specifications, where "Security Engine" is marked "No" for MPC870.

What package type and pin count does the MPC870CVR133 use?

The MPC870CVR133 uses a 256-ball plastic ball grid array (PBGA) package with 1.27-mm ball pitch. This mechanical configuration is specified in Section 6 of the MPC875/MPC870 Hardware Specifications Rev. 4 and confirmed in the "Mechanical Data and Ordering Information" section (page 71).

Can the MPC870CVR133 operate with 5-V tolerant I/O pins?

Yes, selected I/O pins on the MPC870CVR133 - including PA[0:15], PB[14:31], PC[4:15], PD[3:15], PE[14:31], and MII-related signals - are 5-V tolerant, provided the input voltage does not exceed VDDH + 2.5 V and never exceeds 5.5 V. This tolerance is defined in Table 6 (DC Electrical Specifications) and Section 8 (Power Supply and Power Sequencing).

What is the thermal resistance specification for the MPC870CVR133 PBGA package?

The MPC870CVR133 PBGA package has a junction-to-board thermal resistance (RθJB) of 20°C/W under JEDEC JESD51-8 test conditions (2s2p board with vias to ground plane). This value is listed in Table 4 of the MPC875/MPC870 Hardware Specifications Rev. 4 and is critical for calculating junction temperature in thermally constrained industrial enclosures.