Monolithic Power Systems Inc. MPM3612GLQ-Z

Overview

MPM3612GLQ-Z from Monolithic Power Systems is a synchronous step-down power module integrating high- and low-side MOSFETs, 2.2µH inductor, and control circuitry in a single LGA (3mm×3mm×2mm) package. It delivers up to 1A continuous output current with ultra-low 5µA quiescent current, operates from 3V to 22V input, and supports adjustable output voltages from 0.6V to VIN × 98%. It is deployed in battery-powered IoT edge nodes requiring long standby life and stable 3.3V/5V rail generation.

For engineers reviewing the MPM3612GLQ-Z datasheet, MPM3612GLQ-Z pinout, MPM3612GLQ-Z application, or MPM3612GLQ-Z equivalent, key selection criteria include its 5µA IQ for multi-year battery operation, integrated inductor enabling <10mm² solution size, COT control for sub-100µs load transient response, and PG flag for system power sequencing validation.

Technical Context

The MPM3612GLQ-Z uses constant-on-time (COT) control architecture with internal ramp compensation, enabling seamless transition between pulse-skip mode (PSM) at light loads and fixed-frequency CCM (1.25MHz) at heavy loads. Its valley-current-limit OCP and hiccup-mode recovery provide robust short-circuit protection without external sensing components.

It integrates a 3.3V VCC LDO powered from VIN, an open-drain PG output with 120µs rising/falling deglitch timing, and EN-controlled output discharge via active low-side FET sinking. Thermal shutdown triggers at 150°C with 20°C hysteresis, and UVLO activates at 2.8V rising threshold with 170mV hysteresis.

Key Specifications

Pinout & Package

LGA package (3mm × 3mm × 2mm) with exposed thermal pad on underside-must be soldered to PCB ground plane for thermal and electrical integrity. Pin 3 (GND) and exposed pad are electrically connected and serve as primary thermal path.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar step-down power module applications.

Compared with TPSM84203 and LTM4622, the MPM3612GLQ-Z uniquely combines ultra-low IQ, integrated magnetics, and PG signaling in a 3mm×3mm footprint-making it optimal for space-constrained, battery-critical IoT endpoints where reliability and ease of qualification outweigh marginal cost differences.

Availability

MPM3612GLQ-Z is available at Aetrix Electronics and suitable for IoT sensor nodes, home security systems, portable medical monitors, and industrial gateways requiring stable component supply across multi-year production cycles.

Supply support for MPM3612GLQ-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs and modules, with design centers in the US, China, and Taiwan.

The MPM3612 belongs to MPS's ultra-low-IQ power module product line, engineered specifically for battery-powered edge devices demanding decade-long operational life, minimal PCB area, and simplified qualification through full integration.

FAQ

What is the minimum recommended output capacitance for stable operation?

The MPM3612GLQ-Z requires ≥22µF ceramic output capacitance (X5R/X7R) placed adjacent to VOUT pins. Lower values risk instability under dynamic load steps; the datasheet specifies 22µF as minimum for 1A operation with <1% output ripple. Larger values (e.g., 47µF) improve transient response but must stay below COUT_MAX = (ILIM_AVG − IOUT) × tSS / VOUT to avoid soft-start failure.

Can the MPM3612GLQ-Z operate with input voltage below 3V?

No. The absolute minimum operating VIN is 3V per datasheet specifications. Below 3V, the internal VCC LDO cannot sustain control circuitry, and UVLO prevents startup. The 2.8V UVLO rising threshold ensures reliable turn-on only when VIN exceeds 3V nominal-this is a hard functional limit, not a derating recommendation.

How does the power-good (PG) pin behave during thermal shutdown?

During thermal shutdown, the PG pin is pulled low immediately-no delay-by internal logic asserting fault condition. It remains low until junction temperature drops to ~130°C (20°C hysteresis), soft-start completes, and VFB exceeds 92% of 600mV reference for 120µs. This provides deterministic system-level fault indication without software intervention.

Is the exposed thermal pad electrically connected to GND?

Yes. The exposed pad is internally bonded to Pin 3 (GND) and serves as both primary thermal conduction path and electrical ground reference. It must be soldered to a solid PCB ground plane using ≥9 solder paste apertures (0.3mm diameter) and thermal vias to inner ground layers-failure to do so causes thermal shutdown at ≤600mA load.

Does the MPM3612GLQ-Z support pre-biased output startup?

Yes. The device implements monotonic pre-biased start-up: if VOUT is held at a non-zero voltage during enable, the internal soft-start capacitor charges while VBST refreshes, preventing reverse current flow and ensuring VOUT ramps monotonically upward without droop or overshoot-critical for powering FPGA configuration rails.

What is the maximum duty cycle and how is it enforced?

The maximum duty cycle is 96–98%, enforced by internal tOFF_MIN = 140ns and minimum switching frequency of 240kHz. When VIN approaches VOUT (e.g., 3.6V → 3.3V), the controller extends tON beyond normal COT timing to maintain regulation, reducing fSW to 240kHz-this prevents dropout while preserving stability and minimizing output ripple.

How is output over-voltage protection triggered and cleared?

OVP triggers when VOUT exceeds 120% of the feedback reference (720mV for 3.3V output) for >8µs. The LS-FET then actively discharges VOUT until VFB falls to 110% VREF (660mV). Clearance is automatic-no latch or reset required-and resumes normal regulation once the fault condition ends, with no need for power cycle.