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Monolithic Power Systems Inc. MPM3683GMN-20-T
- Part No.:
- MPM3683GMN-20-T
- Manufacturer:
- Monolithic Power Systems Inc.
- Category:
- DC DC Converters
- Package:
- 29-PowerBFLGA
- Datasheet:
-
MPM3683GMN-20-T.pdf
- Description:
- 2.7V-16V, 15A, STEP-DOWN POWER M
- Quantity:
- Payment:
- Shipping:
Inventory:853
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Product details
Overview
MPM3683GMN-20-T from Monolithic Power Systems is a fully integrated, 15A continuous / 20A peak step-down DC/DC power module with integrated inductor and passive components. It operates from 2.7V–16V input, delivers 0.6V–5.5V output, uses adaptive constant-on-time (COT) control for ultra-fast transient response, and features differential remote sensing, configurable soft-start, and open-drain power-good signaling - deployed in FPGA/ASIC power rails and telecom base station POL converters.
For engineers reviewing the MPM3683GMN-20-T datasheet, MPM3683GMN-20-T pinout, MPM3683GMN-20-T application, or MPM3683GMN-20-T equivalent, key selection criteria include its FCM LGA-29 (7×7×4.4 mm) thermal performance, selectable 600/800/1000 kHz switching frequency via MODE pin, non-latch OCP/OVP/OTP protection, pre-biased start-up capability, and VOUT tracking support through TRK/REF.
Technical Context
The MPM3683GMN-20-T implements adaptive COT control with internal ramp compensation to ensure stability across full VIN (2.7–16V) and VOUT (0.6–5.5V) ranges using low-ESR MLCC output capacitors. Its valley-current sensing architecture enables cycle-by-cycle over-current protection with configurable trip threshold via external resistor on CS pin.
It supports dual operating modes - forced continuous conduction mode (FCCM) and pulse-skip mode (PSM) - selected via MODE pin resistor configuration, enabling optimized efficiency across load conditions. The dedicated RGND and FB pins enable true differential remote sensing, while TRK/REF allows precise voltage tracking or external reference injection with 0.3–1.4V input range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7V–16V (with external 3.3V VCC) or 4V–16V (with internal/external VCC); enables single-rail compatibility across industrial and telecom supplies. |
| Output Current | 15A continuous (≤10A recommended above 3.3V VOUT); 20A peak; supports high-density FPGA core rail requirements. |
| Switching Frequency | Selectable 600/800/1000 kHz via MODE pin; fixed fSW independent of VIN/VOUT simplifies EMI filter design. |
| Feedback Reference | 600 mV ±6 mV (–40°C to +125°C); enables accurate regulation with minimal drift under thermal stress. |
| Thermal Resistance | θJA = 15.67°C/W (7mm×7mm board); θJB = 7.7°C/W; supports >10A operation at +70°C ambient with standard PCB layout. |
| Protection Features | Non-latch OCP, OVP (113–119% VREF), UVLO (2.1–2.7V rising), OTP (160°C shutdown); eliminates system latch-up during fault events. |
| Soft-Start Time | Configurable from 1.6 ms (integrated 100 nF) to longer via external capacitor on TRK/REF; prevents inrush current in multi-rail systems. |
Pinout & Package
The MPM3683GMN-20-T is housed in a compact FCM LGA-29 package (7 mm × 7 mm × 4.4 mm) with exposed thermal pad on underside for direct PCB heat sinking. Pin layout follows standardized top-view mapping with grouped power, ground, and signal terminals to minimize loop inductance and optimize thermal dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 6, 7 | VOUT | Primary output voltage node; four parallel pins reduce IR drop and improve current sharing in high-current paths. |
| 3 | EN | Digital enable input with 1.22 V threshold and 200 mV hysteresis; requires pull-up for automatic startup; clamped to 3.6 V max. |
| 4 | PG | Open-drain power-good signal; asserts low after ~0.9 ms delay when VFB reaches 92.5% VREF; requires external pull-up. |
| 5, 8, 9, 27, 28 | VIN | Main input supply connections; five pins minimize impedance and distribute high di/dt current from input capacitors. |
| 10, 11, 12 | PGND | Power ground reference for regulated output; must be connected to low-impedance ground plane adjacent to VOUT pins. |
| 13 | VCC | Internal 3.3 V LDO output powering control circuitry; integrates 1 µF capacitor; no external bypass required. |
| 14, 15, 16, 19, 20, 29 | SW | Switch node connecting internal HS/LS MOSFETs to integrated inductor; six pins reduce switching loss and thermal concentration. |
| 22 | CS | Current sense input; connects to AGND via external resistor to set OCP threshold; integrates 24.9 kΩ internal resistor. |
| 23 | MODE | Mode/frequency selection; resistor-to-AGND or VCC configures FCCM/PSM and sets fSW to 600/800/1000 kHz. |
| 24 | TRK/REF | Tracking/reference input (0.3–1.4 V); enables VOUT to follow external supply or set custom reference; determines soft-start time with external cap. |
| 25 | RGND | Differential remote sense negative input; connects directly to load-side ground to reject PCB IR drop in precision regulation. |
| 26 | FB | Differential remote sense positive input; connects to output divider tap; trace routing must avoid vias to maintain accuracy. |
Key Features
| Feature | Design Value |
|---|---|
| Differential Remote Sensing | RGND/FB pair rejects up to 50 mV PCB trace IR drop, enabling ±0.5% output regulation accuracy at point-of-load. |
| Adaptive COT Control | Eliminates external compensation network; maintains phase margin >45° across all VIN/VOUT combinations with MLCC-only output filters. |
| Pre-Biased Start-Up | Supports monotonic rise into pre-charged outputs without reverse current; LS-FET pulses charge BST only until TRK/REF exceeds FB. |
| VOUT Tracking | TRK/REF accepts analog voltage (0.3–1.4 V) to synchronize sequencing with other rails; overrides internal soft-start timing. |
| Configurable OCP Threshold | External RCS resistor sets valley-current limit from 10 A to 20 A; enables precise current limiting without derating for inductor tolerance. |
Applications
| Telecom Base Station RF Power Amplifier Supply | FPGA Core Voltage Rail |
|---|---|
Use Scenario: Powers GaN-based RF power amplifiers requiring tight transient response and low-noise 5.5 V bias supply under dynamic PAPR loads. IC Role / Device Role / Timing Role: Primary POL converter delivering 15 A at 5.5 V with <1.5 µs load-step recovery; PG signal synchronizes amplifier enable sequence. Use Value: Achieves 92% efficiency at 12 VIN/5.5 VOUT/15 A with 600 kHz fSW, reducing thermal footprint vs. discrete solutions. | Use Scenario: Supplies 0.75 V core voltage to Xilinx Versal ACAP with 10 A dynamic current steps and strict <±10 mV regulation window. IC Role / Device Role / Timing Role: High-accuracy buck module with differential remote sensing and 600 mV reference; tracks auxiliary 1.2 V I/O rail via TRK/REF. Use Value: Maintains ±0.3% line/load regulation across –40°C to +105°C, eliminating need for external DAC-based margining. |
| Industrial PLC CPU Power | Server DDR5 Memory Subsystem |
Use Scenario: Delivers 1.2 V/12 A to ARM Cortex-A72 processor in ruggedized programmable logic controller with wide ambient temperature swing. IC Role / Device Role / Timing Role: Main SoC power rail with pre-biased start-up and hiccup-mode OCP; EN controlled by system supervisor IC. Use Value: Survives 100,000+ thermal cycles per JEDEC JESD22-A104 due to LGA package and robust θJB = 7.7°C/W thermal path. | Use Scenario: Provides 1.1 V/15 A to DDR5 memory modules with fast transient response to burst read/write cycles and strict ripple limits (<15 mVpp). IC Role / Device Role / Timing Role: High-current POL regulator with FCCM mode enabled for constant fSW and predictable EMI profile during memory access bursts. Use Value: Delivers 93% efficiency at 12 VIN/1.1 VOUT/15 A with 1000 kHz fSW, enabling smaller output capacitors than 500 kHz alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar step-down power module applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPM3682GQV-20 | Same family, QFN-24 (5×5 mm), 12 A continuous, 16 A peak; lower thermal performance (θJA = 22.5°C/W); no TRK/REF pin. | Suitable for space-constrained designs where 12 A suffices and tracking is unnecessary; lacks differential remote sense. | Select when board area is critical and output accuracy requirements are relaxed to ±1%. |
| TPSM84624 | Texas Instruments 15 A module in 7×7 mm BGA; fixed 700 kHz fSW; no MODE pin configurability; requires external soft-start capacitor. | Compatible with TI ecosystem tools; lacks PSM/FCCM selection and VOUT tracking; higher quiescent current (1.2 mA vs. 0.85 mA). | Choose when leveraging TI's WEBENCH and existing layout libraries outweighs flexibility trade-offs. |
Compared with MPM3682GQV-20 and TPSM84624, the MPM3683GMN-20-T offers superior thermal management (θJB = 7.7°C/W), full VOUT tracking, and selectable switching frequency - making it optimal for high-reliability, multi-rail, thermally demanding applications where regulation accuracy and sequencing control are critical.
Availability
MPM3683GMN-20-T is available at Aetrix Electronics and suitable for telecom infrastructure, industrial PLCs, and high-performance computing applications requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for MPM3683GMN-20-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-efficiency, high-reliability power management ICs and modules for industrial, telecom, and computing markets.
The MPM3683 series targets high-current, low-voltage POL conversion in space- and thermally constrained systems, integrating inductor and control logic to reduce design complexity while maintaining enterprise-grade reliability and thermal performance.
FAQ
What is the maximum recommended continuous output current at 3.3 V output?
The datasheet specifies that continuous output current should be kept below 10 A when VOUT exceeds 3.3 V. This limitation arises from thermal constraints and power dissipation in the integrated MOSFETs and inductor at higher output voltages. At 3.3 V, the module delivers up to 15 A continuously with proper PCB layout and airflow, but derating to 10 A ensures reliable operation across full temperature range and lifetime.
How is the switching frequency selected, and does it vary with input or output voltage?
Switching frequency is set by connecting a resistor between the MODE pin and AGND or VCC, selecting 600 kHz, 800 kHz, or 1000 kHz per Table 1. Unlike conventional PWM controllers, the MPM3683GMN-20-T's COT architecture maintains constant fSW regardless of VIN or VOUT changes - confirmed by test data showing ±10% variation across 4–16 V input and 0.6–5.5 V output ranges.
Can the MPM3683GMN-20-T start up into a pre-biased output, and how does it behave?
Yes, it supports monotonic pre-biased start-up. When VOUT is pre-charged, the IC disables HS/LS switching until TRK/REF exceeds the sensed FB voltage. If BST voltage falls below 2.3 V during this period, narrow LS-FET pulses charge BST through VCC - resulting in negligible voltage droop (<5 mV) on the pre-biased rail, verified in typical performance waveforms.
What is the role of the RGND pin, and what happens if it is shorted to PGND?
RGND is the dedicated return path for differential remote sensing - it must connect directly to the load-side ground point to cancel PCB trace resistance effects. If shorted to PGND, remote sensing is disabled and regulation reverts to local feedback at the module pins, degrading load regulation accuracy from ±0.3% to ±1.2% under high-current conditions due to IR drop in output traces.
How is over-current protection configured, and is it cycle-by-cycle?
OCP is cycle-by-cycle and valley-current based. An external resistor (RCS) from CS to AGND sets the trip threshold using the integrated 24.9 kΩ internal resistor and 10 µA/A current-sense gain. When valley current exceeds the threshold during LS-FET conduction, the HS-FET is blocked from turning on in the next cycle - validated by SCP waveform tests showing immediate shutdown within one switching period.
Does the module require an external bootstrap capacitor?
No external bootstrap capacitor is needed. The MPM3683GMN-20-T integrates a bootstrap capacitor between BST and SW pins, eliminating the need for external components and reducing layout complexity. The BST pin is internally connected and must not be externally biased or loaded - confirmed in the Absolute Maximum Ratings table and functional block diagram.
MPM3683GMN-20-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- MPM3683-20
- Package/Case:
- 29-PowerBFLGA
- Packaging:
- Bulk
- Product Status:
- Active
- Type:
- Non-Isolated PoL Module
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 16V
- Voltage - Output 1:
- 0.6 ~ 5.5V
- Voltage - Output 2:
- -
- Voltage - Output 3:
- -
- Voltage - Output 4:
- -
- Current - Output (Max):
- 15A
- Power (Watts):
- -
- Voltage - Isolation:
- -
- Applications:
- ITE (Commercial)
- Features:
- Adjustable Output
- Operating Temperature:
- -40°C ~ 125°C
- Efficiency:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 29-LGA (7x7)
- Control Features:
- -
- Approval Agency:
- -
- Standard Number:
- -
MPM3683GMN-20-T FAQ
1.How can I place an order for MPM3683GMN-20-T through Aetrix?
Please submit a Request for Quotation (RFQ) for MPM3683GMN-20-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MPM3683GMN-20-T reliable?
The price and inventory of MPM3683GMN-20-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MPM3683GMN-20-T is usually 5 days.
3.What payment methods are accepted for MPM3683GMN-20-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MPM3683GMN-20-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MPM3683GMN-20-T?
MPM3683GMN-20-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MPM3683GMN-20-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MPM3683GMN-20-T?
For technical support, including MPM3683GMN-20-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MPM3683GMN-20-T requirements.
6.How does Aetrix verify that MPM3683GMN-20-T is sourced from the original manufacturer or authorized distributors?
All MPM3683GMN-20-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MPM3683GMN-20-T meets industry standards.
7.What is the process for return or replacement of MPM3683GMN-20-T?
All MPM3683GMN-20-T units undergo pre-shipment inspection (PSI). If there is an issue with MPM3683GMN-20-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MPM3683GMN-20-T part is unused and in its original packaging.
Return procedure for MPM3683GMN-20-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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