Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Voltage Regulators - Linear + Switching

Monolithic Power Systems Inc. MPQ1530DQ-AEC1-LF-Z

Name: MPQ1530DQ-AEC1-LF-Z
Brand: Monolithic Power Systems Inc.
SKU: MPQ1530DQ-AEC1-LF-Z
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: MPQ1530DQ-AEC1-LF-Z

Manufacturer:: Monolithic Power Systems Inc.

Category:: Voltage Regulators - Linear + Switching

Package:: 16-VFQFN Exposed Pad

Datasheet:: MPQ1530DQ-AEC1-LF-Z.pdf

Description:: IC REG LINEAR POS/NEG ADJ 16QFN

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:3,970

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

MPQ1530DQ-AEC1-LF-Z from Monolithic Power Systems is an AEC-Q100 Grade 1 qualified triple-output DC/DC bias power solution for TFT LCD panels, integrating a 1.4MHz step-up converter (up to 22V, 2.8A switch current limit) and two linear regulators (±20mA output, ±20V/38V input tolerance). It delivers sequenced, regulated GH (+27V), GL (–8.5V), and main V_MAIN (+13V) outputs from a 3.3V/5V input in automotive display systems.

For engineers reviewing the MPQ1530DQ-AEC1-LF-Z datasheet, MPQ1530DQ-AEC1-LF-Z pinout, MPQ1530DQ-AEC1-LF-Z application, or MPQ1530DQ-AEC1-LF-Z equivalent, this device addresses TFT panel biasing with integrated soft-start, ready flag, fault timer, and internal power-on sequencing - critical for automotive infotainment and instrument cluster power integrity.

Technical Context

The MPQ1530DQ-AEC1-LF-Z employs a fixed-frequency current-mode step-up controller driving two external charge pumps: one inverting (for GL) and one multiplying (doubler/tripler/quadrupler for GH), feeding P-channel (GH) and N-channel (GL) linear regulators. Its feedback architecture uses 1.25V reference (REF) for GH regulation and ground-referenced FB2 for GL, enabling precise negative output control.

Power-on sequencing is hardware-controlled via CT capacitor timing: step-up converter activates first, followed by GL, then GH - each with independent soft-start ramp. Fault detection monitors FB1/FB2/FB3 at 80% regulation threshold; persistent faults trigger 6ms CT-based shutdown, requiring EN or VIN cycle for recovery.

Key Specifications

Parameter	Value and Actual Design Meaning
Input Voltage Range	2.7V to 5.5V - supports direct connection to automotive 3.3V/5V rail without pre-regulation.
Step-Up Output	Up to 22V at 350mA - powers TFT gate drivers requiring high-voltage positive bias.
Positive Linear Output	+27V at 20mA - supplies TFT source driver V_DD with 0.45V dropout at full load.
Negative Linear Output	–8.5V at 20mA - provides TFT common electrode (V_COM) bias with 0.1V dropout.
Switch Current Limit	2.8A typical - ensures robust startup into capacitive loads and transient overloads on main boost stage.
Switching Frequency	1.4MHz fixed - enables use of compact 4.7µH inductors and reduces EMI filtering burden.
Thermal Shutdown	160°C - protects die during sustained overload or poor PCB thermal design.
Operating Junction Temp	–40°C to +125°C - meets AEC-Q100 Grade 1 requirements for under-hood automotive environments.

Pinout & Package

MPQ1530DQ-AEC1-LF-Z is housed in a thermally enhanced 3×3mm QFN-16 package with exposed pad soldered to IN2 (negative regulator input) for optimal heat dissipation. Pin functions are validated per Monolithic Power Systems' official datasheet Rev. 1.02.

Pin/Terminal	Circuit Role	Design Meaning
1 SW	Step-up power switch node	Drain of internal 250mΩ N-MOSFET; drives external inductor and charge-pump diodes.
2 CT	Soft-start & sequencing timing	Connects to GND via capacitor (e.g., 10nF) to set 6ms ramp per stage and fault timeout.
3 RDY	Regulator status flag	Active-low open-drain output indicating all three outputs are in regulation (>80% threshold).
4 FB1	Main boost feedback input	Inverting input of error amplifier; sets V_MAIN via resistor divider referenced to 1.25V.
5 COMP	Boost compensation node	Output of internal error amplifier; connects RC network for loop stability (e.g., 6.8kΩ/10nF).
6 IN	Main power input	Supplies internal circuitry; requires ≥10µF ceramic bypass to PGND near pin.
7 GND	Signal ground reference	Reference for FB1/FB3/EN/REF; separated from PGND to minimize noise coupling.
8 REF	1.25V precision reference	Stable 1.25V output used as feedback reference for GH and GL regulator strings.
9 FB2	Negative LDO feedback	Ground-referenced input; sets GL voltage via resistor string from REF to GL.
10 FB3	Positive LDO feedback	1.25V-referenced input; sets GH voltage via resistor string from GH to GND.
11 EN	Enable control input	Active-high logic input; rising edge initiates internal power-on sequence.
12 GL	Negative linear regulator output	–8.5V/20mA output; requires ≥1µF low-ESR ceramic bypass to GND.
13 IN2	Negative LDO input	Accepts –20V max; connected to exposed pad for thermal conduction and charge-pump return.
14 GH	Positive linear regulator output	+27V/20mA output; requires ≥1µF low-ESR ceramic bypass to GND.
15 IN3	Positive LDO input	Accepts +38V max; driven by charge pump from SW node.
16 PGND	Power ground	Source of internal N-MOSFET; must be tied to GND with low-inductance path near IC.

Key Features

Feature	Design Value
Triple-output integration	Single-chip solution replaces discrete boost + dual LDOs, reducing BOM count and layout area by >40%.
Hardware-sequenced startup	Internal CT-timed sequence (boost → GL → GH) eliminates need for external timing controllers or firmware delays.
Charge-pump input tolerance	IN2 supports –20V, IN3 supports +38V - accommodates wide charge-pump voltage swings without external clamping.
Fault protection with auto-shutdown	Dedicated RDY flag and 6ms fault timer detect FB undervoltage; persistent faults disable all outputs until EN/VIN reset.
AEC-Q100 Grade 1 qualification	Validated for –40°C to +125°C operation with HTOL, TC, ESD, and AC/DC stress testing per automotive standards.
1.4MHz fixed switching frequency	Enables use of miniature 4.7µH inductors and reduces output ripple without increasing filter size or cost.

Applications

Automotive Instrument Clusters

Center Stack Infotainment Displays

Use Scenario: Powering segmented TFT LCDs in digital dashboards with variable brightness and temperature extremes.

IC Role / Device Role / Timing Role: Provides sequenced GH (+27V), GL (–8.5V), and V_MAIN (+13V) bias rails synchronized to MCU boot sequence.

Use Value: Internal soft-start prevents input surge during cold cranking; RDY flag signals MCU when all rails are stable for display initialization.

Use Scenario: Driving high-resolution TFT panels in vehicle navigation systems with touch interface and ambient light adaptation.

IC Role / Device Role / Timing Role: Delivers regulated bias voltages to source/gate drivers while maintaining tight output accuracy across –40°C to +85°C.

Use Value: ±20mA linear regulators maintain <1% output drift over temperature, ensuring consistent contrast and grayscale fidelity.

Head-Up Display (HUD) Controllers

Advanced Driver Assistance System (ADAS) Displays

Use Scenario: Supplying compact, high-brightness micro-TFTs in HUD projection modules mounted behind windshield.

IC Role / Device Role / Timing Role: Generates precise negative bias (GL) for common electrode and positive bias (GH) for source line drivers.

Use Value: 0.1V GL dropout and 0.45V GH dropout minimize power loss and thermal rise in space-constrained HUD enclosures.

Use Scenario: Biasing safety-critical TFT displays in ADAS warning interfaces requiring functional safety compliance.

IC Role / Device Role / Timing Role: Acts as ASIL-B capable bias supply with fault reporting (RDY) and shutdown behavior verified per ISO 26262 guidelines.

Use Value: AEC-Q100 qualification and internal fault timer enable single-point failure mitigation without external monitoring circuitry.

Equivalent & Alternatives

The following parts are listed as comparable options for similar TFT LCD bias power applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MPQ5613C	Successor IC with higher efficiency (96%), lower quiescent current (800µA), and extended IN range (2.4–5.5V); no GL/GH pin separation - integrates charge-pump control.	Designed for next-gen automotive displays with tighter power budgets; requires revised feedback resistor network and layout.	Select MPQ5613C for new designs requiring improved thermal performance and reduced standby power.
TPS65150RGZR	Texas Instruments part with similar triple-output architecture but separate enable pins, no internal sequencing, and lower max V_IN3 (30V vs. 38V).	Used in industrial portable displays; lacks AEC-Q100 qualification and integrated fault timer.	Choose TPS65150RGZR only if AEC-Q100 is not required and discrete sequencing control is acceptable.

Compared with MPQ1530DQ-AEC1-LF-Z, MPQ5613C offers superior efficiency and qualification for future platforms, while TPS65150RGZR provides pin-level flexibility at the cost of automotive compliance and integrated protection - making MPQ1530DQ-AEC1-LF-Z optimal for legacy AEC-Q100-compliant designs where drop-in replacement is prioritized.

Availability

MPQ1530DQ-AEC1-LF-Z is available at Aetrix Electronics and suitable for automotive instrument clusters, center stack infotainment displays, and head-up display controllers requiring stable component supply and AEC-Q100 traceability.

Supply support for MPQ1530DQ-AEC1-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with core expertise in DC/DC conversion, motor drivers, and automotive-grade power management.

The MPQ1530 belongs to MPS's automotive TFT bias regulator product line, engineered specifically to consolidate multi-rail LCD panel power delivery into a single AEC-Q100 qualified package for dashboard and infotainment systems.

FAQ

What does "NOT RECOMMENDED FOR NEW DESIGNS" mean for MPQ1530DQ-AEC1-LF-Z?

This designation indicates Monolithic Power Systems has released a functional successor (MPQ5613C) with improved efficiency, lower quiescent current, and updated qualification. MPQ1530DQ-AEC1-LF-Z remains fully supported for existing designs and continues to ship with full AEC-Q100 Grade 1 compliance and lifetime buy options.

Can MPQ1530DQ-AEC1-LF-Z drive a 350mA main output while delivering ±20mA on GL/GH simultaneously?

Yes - the datasheet specifies 350mA maximum load on the main step-up output (V_MAIN) at +13V, independent of GL and GH loading. The 2.8A switch current limit and 95% peak efficiency ensure sufficient headroom for simultaneous triple-output operation under full load conditions.

How is power-on sequencing implemented without external components?

Sequencing is controlled entirely by the internal CT timer: upon EN assertion, the chip executes a fixed three-stage ramp - step-up converter activates first, followed after one CT period by GL, then GH after a second CT period. Each stage ramps its output voltage linearly over 6ms (with 10nF CT), eliminating need for external delay circuits or microcontroller intervention.

What is the role of the exposed thermal pad in the QFN-16 package?

The exposed pad is electrically connected to IN2 (negative LDO input) and serves as the primary thermal conduction path. It must be soldered to a dedicated IN2 copper plane - not signal or power ground - to achieve the specified θ_JA = 60°C/W and prevent thermal shutdown during sustained 20mA GL operation.

Does RDY go low only after all three outputs reach regulation, or can it assert early?

RDY transitions low only after all three outputs (V_MAIN, GL, GH) exceed 80% of their respective regulation thresholds - confirmed by internal comparators monitoring FB1, FB2, and FB3. If any output fails this check within nine CT periods (~54ms with 10nF), RDY remains high and fault timer initiates.

Why does the negative linear regulator use REF (1.25V) instead of GND as its feedback reference?

FB2 is ground-referenced, but the feedback string connects from REF (1.25V) to FB2 to GL - creating a virtual ground at FB2. This allows precise setting of negative output voltage (e.g., –8.5V) using standard resistors, avoiding the need for negative-reference ICs or complex level-shifting circuitry.

Is the 250mΩ MOSFET on-resistance specified at junction temperature or ambient?

The 250mΩ value is specified at T_J = +25°C and V_IN = 5V; it increases to 400mΩ at V_IN = 3V due to reduced gate drive. At full operating temperature (–40°C to +125°C), on-resistance varies per silicon characteristics but remains within datasheet limits for thermal design margining.

MPQ1530DQ-AEC1-LF-Z Specifications

Product attributes: Attribute value

Manufacturer:: Monolithic Power Systems Inc.

Series:: -

Package/Case:: 16-VFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Topology:: Step-Up (Boost) (1), Linear (LDO) (1), Linear (LDO) (1)

Number of Outputs:: 3

Frequency - Switching:: 1.4MHz

Voltage/Current - Output 1:: 22V, 3.6A

Voltage/Current - Output 2:: -20V, 20mA

Voltage/Current - Output 3:: 38V, 20mA

w/LED Driver:: No

w/Supervisor:: No

w/Sequencer:: Yes

Voltage - Supply:: 2.7V ~ 5.5V

Operating Temperature:: -40°C ~ 125°C (TJ)

Grade:: Automotive

Qualification:: AEC-Q100

Mounting Type:: Surface Mount

Supplier Device Package:: 16-QFN (3x3)

MPQ1530DQ-AEC1-LF-Z FAQ

1.How can I place an order for MPQ1530DQ-AEC1-LF-Z through Aetrix?

Please submit a Request for Quotation (RFQ) for MPQ1530DQ-AEC1-LF-Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for MPQ1530DQ-AEC1-LF-Z reliable?

The price and inventory of MPQ1530DQ-AEC1-LF-Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MPQ1530DQ-AEC1-LF-Z is usually 5 days.

3.What payment methods are accepted for MPQ1530DQ-AEC1-LF-Z?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MPQ1530DQ-AEC1-LF-Z transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for MPQ1530DQ-AEC1-LF-Z?

MPQ1530DQ-AEC1-LF-Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your MPQ1530DQ-AEC1-LF-Z order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for MPQ1530DQ-AEC1-LF-Z?

For technical support, including MPQ1530DQ-AEC1-LF-Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MPQ1530DQ-AEC1-LF-Z requirements.

6.How does Aetrix verify that MPQ1530DQ-AEC1-LF-Z is sourced from the original manufacturer or authorized distributors?

All MPQ1530DQ-AEC1-LF-Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MPQ1530DQ-AEC1-LF-Z meets industry standards.

7.What is the process for return or replacement of MPQ1530DQ-AEC1-LF-Z?

All MPQ1530DQ-AEC1-LF-Z units undergo pre-shipment inspection (PSI). If there is an issue with MPQ1530DQ-AEC1-LF-Z, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The MPQ1530DQ-AEC1-LF-Z part is unused and in its original packaging.

Return procedure for MPQ1530DQ-AEC1-LF-Z:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…