Monolithic Power Systems Inc. MPQ1530DQ-LF-P

Overview

MPQ1530DQ-LF-P from Monolithic Power Systems is a triple-output DC/DC bias power solution integrating a 1.4MHz step-up converter (up to 22V, 2.8A switch current limit) and two linear regulators (±20mA output, ±20V/38V input tolerance) in a single 3×3mm QFN-16 package. It delivers TFT LCD panel bias voltages - positive high-voltage (GH), negative high-voltage (GL), and main boost (MAIN) - from a 2.7–5.5V supply, with internal power-on sequencing and AEC-Q100 Grade 1 qualification for automotive displays.

For engineers reviewing the MPQ1530DQ-LF-P datasheet, MPQ1530DQ-LF-P pinout, MPQ1530DQ-LF-P application, or MPQ1530DQ-LF-P equivalent, this device supports precise TFT gate driver voltage generation with integrated soft-start, ready flag signaling, cycle-by-cycle overcurrent protection, and fault-timed shutdown - critical for display power integrity in infotainment and instrument cluster designs.

Technical Context

The MPQ1530DQ-LF-P employs a fixed-frequency (1.4MHz) current-mode step-up controller driving an internal 250mΩ N-channel MOSFET, with SW node powering external charge pumps that feed the ±20mA linear regulators. Its feedback architecture uses three independent error amplifiers: FB1 (1.25V threshold) for MAIN regulation, FB3 (1.25V) for GH, and FB2 (0V threshold) referenced to REF (1.25V) for GL.

Power-on sequencing is hardware-controlled via CT capacitor timing: MAIN enables first, followed by GL, then GH - each with synchronized soft-start ramps. Fault detection monitors all three FB inputs; if any falls below 80% of its target for >6ms (CT=10nF), RDY goes high and full shutdown occurs, requiring EN or VIN cycling to recover.

Key Specifications

Pinout & Package

MPQ1530DQ-LF-P is housed in a thermally enhanced 3×3mm, 16-pin QFN package with exposed pad soldered to IN2 (negative regulator input) for optimal thermal performance. Pin functions are validated per Monolithic Power Systems Rev. 1.02 datasheet.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar TFT LCD bias generator applications.

Compared with MPQ1530DQ-LF-P, MPQ5613C delivers measurable improvements in efficiency and input voltage headroom while maintaining identical functional scope, whereas TPS65150RGER trades automotive compliance for configurability - making MPQ5613C the direct upgrade path and TPS65150RGER a niche alternative for non-automotive use.

Availability

MPQ1530DQ-LF-P is available at Aetrix Electronics and suitable for automotive instrument clusters, infotainment display modules, and industrial HMI panels requiring stable component supply and long-term lifecycle support.

Supply support for MPQ1530DQ-LF-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with core expertise in DC/DC conversion, motor drivers, and display power management.

The MPQ1530 belongs to MPS's automotive-qualified TFT bias regulator product line, engineered specifically to consolidate multi-rail LCD panel power delivery into compact, AEC-Q100-compliant solutions for automotive and industrial displays.

FAQ

What does "NOT RECOMMENDED FOR NEW DESIGNS" mean for MPQ1530DQ-LF-P?

This designation indicates Monolithic Power Systems has superseded MPQ1530DQ-LF-P with MPQ5613C, which offers improved efficiency, lower quiescent current, and extended input voltage range. MPQ1530DQ-LF-P remains fully supported for existing designs and legacy production, with no announced obsolescence date, but new projects should adopt MPQ5613C per MPS guidance.

How is power-on sequencing implemented without external controllers?

Sequencing is hardwired: upon EN assertion or VIN rise above UVLO, the internal CT timer initiates three sequential 6ms soft-start ramps - first MAIN, then GL, then GH - each enabled only after the prior output reaches regulation. This eliminates external timing ICs or microcontroller intervention while ensuring safe TFT panel startup.

Can MPQ1530DQ-LF-P generate asymmetric bias voltages like +25V/–10V?

Yes. The GH output is set via FB3 resistor divider referenced to GND (1.25V threshold), and GL is set via FB2 referenced to REF (1.25V), enabling independent adjustment. Example configurations include +27V/–8.5V (per datasheet Figure 3) or +25V/–10V using standard 1% resistors, with dropout margins verified per GH (0.45V) and GL (0.1V) specs.

What is the role of the exposed thermal pad in the QFN package?

The exposed pad is electrically connected to IN2 (negative regulator input) and serves as the primary thermal conduction path. It must be soldered to a dedicated IN2 copper plane on the PCB to achieve θJA = 60°C/W. Using it as PGND or GND violates the internal connection and degrades thermal performance and negative regulator stability.

Does RDY indicate only startup completion or ongoing regulation health?

RDY is dynamic: it pulls low only after all three outputs reach >80% of their target voltages and remain there. If any FB input drops below that threshold during operation (e.g., due to load shift or component drift), RDY goes high within ~15μs and initiates a 6ms fault timer - making it both a startup indicator and real-time regulation monitor.

Why does the negative linear regulator use REF instead of GND as its reference?

Using REF (1.25V) as the FB2 reference enables precise negative voltage generation relative to GND. The resistor string from REF to FB2 to GL creates a virtual ground at FB2, allowing the error amplifier to regulate GL to a negative value determined by the ratio - e.g., REF–GL = 1.25V × (R1/R2). This avoids reliance on noisy or unstable system GND paths.

Is the 250mΩ switch resistance specified at 25°C or over temperature?

The 250mΩ value is specified at VIN = 5V and TJ = +25°C; at VIN = 3V, it rises to 400mΩ due to reduced gate drive. Full temperature range data shows RDS(on) increases by ~0.4%/°C, reaching ~320mΩ at +125°C (VIN = 5V), directly impacting boost efficiency and thermal design margin.