Monolithic Power Systems Inc. MPQ3367AGR-AEC1-Z

Overview

MPQ3367AGR-AEC1-Z from Monolithic Power Systems is a 6-channel, AEC-Q100 Grade 1 automotive-qualified WLED driver with integrated 100mΩ/50V MOSFET, peak-current-mode boost architecture, and I²C interface. It delivers up to 150mA per channel with 2.5% current matching, supports 15000:1 PWM dimming ratio at ≤200Hz, and operates from 3.5V–36V input for LCD backlighting in automotive displays.

For engineers reviewing the MPQ3367AGR-AEC1-Z datasheet, MPQ3367AGR-AEC1-Z pinout, MPQ3367AGR-AEC1-Z application, or MPQ3367AGR-AEC1-Z equivalent, key selection criteria include its AEC-Q100 qualification, phase-shifted PWM dimming for noise suppression, configurable OVP/STH thresholds via external resistors, and support for analog/PWM/mix dimming modes with fault flag (FF) and SD disconnect outputs.

Technical Context

The MPQ3367A uses peak-current-mode control with internal slope compensation to stabilize duty cycles >50%, and dynamically selects the lowest active LEDx voltage to regulate VOUT. Its 6 independent cathode-connected current sinks are controlled by a shared ISET resistor and synchronized via internal timing logic.

Dimming mode selection is implemented through either MIX/AD pin voltage (0.3V/0.5–0.8V/1.0–1.3V thresholds) or I²C register writes, enabling direct PWM, analog, or mix dimming with 25% or 12.5% transfer points. Phase shift is applied across enabled channels (e.g., 60° for 6 strings, 90° for 4 strings) to reduce EMI and audible noise during PWM operation.

Key Specifications

Pinout & Package

MPQ3367AGR-AEC1-Z is housed in a thermally enhanced QFN-24 (4mm × 4mm) package with exposed pad connected to AGND. The 24-pin layout supports full LED string control, I²C communication, protection monitoring, and flexible dimming configuration.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 6-channel automotive WLED driver applications.

Compared with TPS61196RTVR and MAX20057ATP/V+T, MPQ3367AGR-AEC1-Z uniquely integrates 6 matched current sinks, phase-shifted PWM, mix dimming, and AEC-Q100 Grade 1 qualification in a single QFN-24 package-reducing component count, improving EMI performance, and enabling deeper dimming in space-constrained automotive displays.

Availability

MPQ3367AGR-AEC1-Z is available at Aetrix Electronics and suitable for automotive instrument clusters, center stack displays, and head-up display modules requiring stable component supply, AEC-Q100 compliance, and long-term production continuity.

Supply support for MPQ3367AGR-AEC1-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with design focus on efficiency, integration, and reliability for automotive, industrial, and consumer markets.

The MPQ3367A belongs to MPS's automotive-grade LED driver product line, engineered specifically for AEC-Q100-compliant LCD backlighting in safety-critical and thermally demanding vehicle environments.

FAQ

What is the minimum PWM dimming frequency that achieves the full 15000:1 dimming ratio?

The 15000:1 dimming ratio is guaranteed only when the input PWM frequency is ≤200Hz. At higher frequencies (e.g., 20kHz), the effective ratio drops due to finite minimum on-time limitations and gate drive delays-verified in typical performance curves on page 12 of the datasheet.

How does the MPQ3367A handle unused LED channels during startup?

Unused LEDx pins (e.g., LED6 for 5-string operation) must be tied to AGND. The IC detects this during startup and automatically excludes the grounded channel from the feedback loop and phase-shift calculation-ensuring accurate VOUT regulation and correct inter-channel timing.

Can the phase-shift function be disabled while retaining I²C communication?

Yes. Phase shift is enabled only when SCL/PSE and SDA/PSE are tied together and biased between 0.75V–1.0V, or when the PSE bit is set via I²C. Leaving both pins unconnected (or pulled high/low individually) disables phase shift but preserves full I²C functionality for configuration and status reads.

What is the purpose of the SD pin, and how should it be interfaced?

The SD pin is an open-drain output that pulls low during any fault condition (OVP, OTP, OCP, LED short/open). It must drive the gate of an external PMOS transistor placed between VIN and the input capacitor to disconnect power-preventing fault propagation and enabling system-level fail-safe behavior.

Does the MPQ3367A support analog dimming without a PWM input signal?

No. Analog dimming mode still requires a PWM input on the DIM pin-the device internally measures its duty cycle and scales the LED current proportionally (I_LED = I_SET × D_DIM). There is no DC voltage dimming input; all dimming methods are PWM-triggered.

How is over-voltage protection (OVP) configured, and what happens when it triggers?

OVP is set using a resistor divider from VOUT to OVP pin and OVP to AGND, targeting 1.9–2.1V at the OVP pin. When exceeded, the boost converter shuts down, FF pin asserts low, and the IC enters latch-off mode until EN is cycled-preventing damage to downstream LED strings during open-circuit or regulator failure.

What thermal derating applies above 85°C ambient temperature?

At T_A > 85°C, LED current automatically decreases linearly starting at ~100°C junction temperature, reaching 50% of nominal current at 125°C and zero at 170°C (thermal shutdown). This is implemented via internal temperature-sensing circuitry-not a register-controlled feature.