Monolithic Power Systems Inc. MPQ3426DL-AEC1-LF-P
- Part No.:
- MPQ3426DL-AEC1-LF-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 14-VFDFN Exposed Pad
- Datasheet:
-
MPQ3426DL-AEC1-LF-P.pdf
- Description:
- IC REG BOOST PROG 6A 14QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,451
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MPQ3426DL-AEC1-LF-P from Monolithic Power Systems is an AEC-Q100 Grade 1 qualified current-mode boost converter IC with integrated 6A/45V/90mΩ MOSFET, configurable 300kHz–2MHz switching frequency, 3.2V–22V input bias range, and 35V max output voltage. It delivers fast transient response for automotive pre-boost and cold-crank applications requiring stable high-current step-up regulation under wide VIN variation.
For engineers reviewing the MPQ3426DL-AEC1-LF-P datasheet, MPQ3426DL-AEC1-LF-P pinout, MPQ3426DL-AEC1-LF-P application, or MPQ3426DL-AEC1-LF-P equivalent, key selection criteria include its programmable UVLO hysteresis via EN resistor divider, external compensation for ceramic-capacitor stability, soft-start capacitor control, thermal shutdown at 160°C, and QFN-14 (3mm×4mm) wettable-flank-compatible package.
Technical Context
The MPQ3426DL-AEC1-LF-P implements a constant-frequency peak-current-mode control architecture with internal transconductance error amplifier (160μA/V), 1.225V feedback reference, and 6μA soft-start current source. Its FSET pin sets switching frequency linearly via external resistor (e.g., 84.5kΩ yields 540kHz), while COMP pin supports Type II compensation with user-defined poles and zero.
It integrates protection functions including under-voltage lockout (2.75V–3.15V hysteresis), cycle-by-cycle current limiting (6.2A–8.5A), and thermal shutdown at 160°C. The device operates across –40°C to +125°C junction temperature and supports biased supply down to 3.2V, enabling cold-crank operation in 12V automotive systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Switch Rating | 45V drain-source, 6A continuous, 90mΩ RDS(on) - enables load-dump survival and high-efficiency boost up to 35V |
| Input Voltage Range | 3.2V to 22V biased supply - supports automotive cold-crank (≥3V) and post-ignition operation |
| Output Voltage Range | 3.2V to 35V regulated - set via external FB resistor divider with 1.225V reference |
| Switching Frequency | 300kHz to 2MHz programmable via FSET resistor - allows EMI optimization and compact filter design |
| Quiescent Current | 650–950μA typical - minimizes standby power loss in always-on vehicle subsystems |
| UVLO Threshold | 2.75V to 3.15V with 250mV hysteresis - ensures reliable startup and brownout recovery in noisy battery rails |
| Thermal Shutdown | 160°C junction - protects against sustained overload or poor PCB thermal design |
| Shutdown Current | <1μA - enables ultra-low-power system sleep modes |
Pinout & Package
MPQ3426DL-AEC1-LF-P uses a QFN-14 (3mm × 4mm) package with wettable flanks and exposed thermal pad (EP). Pin 1 identification is marked by a corner chamfer (Option A) per JEDEC MO-229 VEED-5. The exposed pad must be soldered to a solid copper thermal plane for optimal power dissipation (θJA = 50°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 COMP | Compensation node | Connects external RC network to stabilize control loop; sets dominant pole/zero for ceramic-output-capacitor compatibility |
| 2 EN | Enable control input | Logic-level on/off control; also programs VIN UVLO hysteresis via external resistor divider |
| 3 VIN | Bias supply input | Accepts 3.2V–22V; powers internal LDO and gate driver; can be decoupled separately from main input |
| 4–6 SW | Power switch drain terminals | Three paralleled pins reduce conduction loss and thermal resistance for 6A peak current |
| 7 VDD | LDO output | 5.9V max regulated supply; can be tied to BIAS to extend low-VIN operation and improve efficiency |
| 8–10 PGND | Power ground return | Three dedicated pins minimize ground bounce during high di/dt switching transitions |
| 11 AGND | Analog ground reference | Single-point connection point for feedback and compensation; isolated from PGND except at EP |
| 12 SS | Soft-start timing | 6μA constant-current charge of external capacitor controls startup ramp rate and limits inrush current |
| 13 FB | Feedback input | 1.225V precision reference; connects to resistor divider to set output voltage with ±1% tolerance |
| 14 FSET | Frequency programming | 0.5V-regulated node; current sink sets fSW linearly (e.g., 84.5kΩ → 540kHz) |
| 15 EP | Exposed thermal pad | Must be soldered to PCB thermal plane; serves as primary PGND path and heat sink (θJC = 12°C/W) |
Key Features
| Feature | Design Value |
|---|---|
| Automotive qualification | AEC-Q100 Grade 1 (–40°C to +125°C TJ) - validated for engine bay and front-end electronics |
| Programmable UVLO hysteresis | Configurable via EN resistor divider - prevents oscillation during slow-rising battery voltage (e.g., cold-crank) |
| External loop compensation | COMP pin supports full Type II design - enables stable regulation with low-ESR ceramic output capacitors (4.7μF–22μF) |
| Micro-power shutdown | <1μA IQ - meets ISO 16750-2 quiescent current requirements for parked vehicle mode |
| Wettable flank package | QFN-14 (3mm×4mm) with solderable side walls - enables automated optical inspection (AOI) of solder joints |
| Fast transient response | Current-mode control with 100ns minimum ON time - maintains regulation during 10A/μs load steps in audio bias supplies |
Applications
| Automotive Pre-Boost | Audio Microphone Bias |
|---|---|
Use Scenario: Boosting 6–9V battery rail to stable 12V during cold-crank when alternator is offline. IC Role / Device Role / Timing Role: Primary step-up regulator providing regulated 12V/3A to ADAS camera modules and radar ECUs. Use Value: Maintains system uptime below 3.2V input with <100μs recovery from 50% load step, preventing sensor dropout. | Use Scenario: Generating clean 24V bias for MEMS microphone arrays in infotainment head units. IC Role / Device Role / Timing Role: Low-noise, high-PSRR boost converter powering analog front-end amplifiers. Use Value: Configurable 2MHz fSW shifts switching noise above audio band (20kHz), eliminating audible artifacts. |
| OLED Display Bias | SEPIC Automotive Supply |
Use Scenario: Providing 35V anode supply for automotive OLED instrument cluster displays. IC Role / Device Role / Timing Role: High-voltage boost stage delivering 35V/0.5A with tight line/load regulation (±1.5%). Use Value: Integrated 45V MOSFET eliminates need for external HV transistor, reducing BOM count and layout area. | Use Scenario: Regulating 12V battery to stable 12V output during load dump (up to 45V transient). IC Role / Device Role / Timing Role: SEPIC topology controller using MPQ3426DL-AEC1-LF-P in non-inverting buck-boost configuration. Use Value: 45V switch rating withstands ISO 7637-2 Pulse 5a (load dump), avoiding external TVS clamping. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar boost converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5122MQ/NOPB | Higher 65V switch rating; requires external MOSFET; no integrated soft-start capacitor control | Preferred for >45V transients (e.g., commercial truck 24V systems); lacks AEC-Q100 qualification | Select when input transients exceed 45V or when discrete FET selection is required for thermal partitioning |
| TPS61088RHLR | Lower 22V switch rating; 10A current limit; fixed 500kHz/1MHz fSW; no UVLO hysteresis programming | Targeted at consumer portable devices; not AEC-Q100 qualified; unsuitable for automotive cold-crank | Choose only for cost-sensitive non-automotive applications where 35V output and AEC-Q100 are not required |
Compared with LM5122MQ/NOPB and TPS61088RHLR, MPQ3426DL-AEC1-LF-P uniquely combines AEC-Q100 Grade 1 qualification, 45V integrated switch, programmable UVLO hysteresis, and wettable-flank QFN packaging-making it the only drop-in solution for space-constrained automotive pre-boost designs requiring production-grade reliability.
Availability
MPQ3426DL-AEC1-LF-P is available at Aetrix Electronics and suitable for automotive pre-boost, cold-crank power conditioning, and OLED display bias applications requiring stable component supply across extended temperature and lifecycle demands.
Supply support for MPQ3426DL-AEC1-LF-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with core expertise in DC/DC converters, LED drivers, and motor drivers for automotive, industrial, and computing markets.
The MPQ3426 product line targets AEC-Q100-compliant automotive power conversion, specifically engineered for robustness in cold-crank, load-dump, and wide-input-range environments where reliability and thermal performance are critical.
FAQ
What is the maximum output voltage achievable with MPQ3426DL-AEC1-LF-P?
The MPQ3426DL-AEC1-LF-P supports regulated output voltages up to 35V, set by the external FB resistor divider and referenced to its 1.225V internal feedback threshold. Operation beyond 35V violates absolute maximum ratings and risks damage to the internal 45V MOSFET due to overvoltage stress on the SW node during transients.
Can MPQ3426DL-AEC1-LF-P operate with input voltage below 3.2V?
No. The device has a guaranteed minimum operating VIN bias of 3.2V per datasheet specifications. Below this, internal LDO regulation fails, gate drive collapses, and the IC enters undervoltage lockout. For sub-3.2V cold-crank support, external biasing or a secondary low-VIN booster is required.
How does the FSET pin determine switching frequency?
The FSET pin is a 0.5V-regulated current sink; its output current (IFSET) flows through an external resistor (RFSET) to AGND. Switching frequency is calculated as fSW ≈ 0.86 / RFSET (with RFSET in kΩ), yielding 540kHz at 84.5kΩ. This linear relationship enables precise EMI tuning without trimming components.
Why are there three SW pins and three PGND pins?
The three SW pins (pins 4–6) and three PGND pins (pins 8–10) are paralleled to reduce conduction losses and thermal resistance for 6A continuous operation. Each SW pin carries ~2A, lowering effective RDS(on) and distributing heat across the package, while multiple PGND paths minimize ground loop inductance and voltage spikes during high di/dt switching.
Is the exposed pad (EP) electrically connected to PGND?
Yes. Pin 15 (EP) is internally connected to PGND and serves as the primary thermal and electrical ground path. It must be soldered to a large PCB copper pour tied directly to the PGND net. Failure to do so causes excessive junction temperature rise (>30°C penalty) and potential thermal shutdown under full load.
Does MPQ3426DL-AEC1-LF-P support synchronous rectification?
No. The MPQ3426DL-AEC1-LF-P uses an asynchronous architecture with external Schottky diode rectification. It does not provide a second gate drive signal or internal synchronous MOSFET control. Synchronous operation would require external driver circuitry and careful dead-time management, which is unsupported by this device's topology.
What is the purpose of the AGND pin, and how should it be routed?
AGND (pin 11) is the dedicated analog ground reference for the error amplifier, FB comparator, and compensation network. It must connect to the exposed pad at a single point only-never daisy-chained-to prevent PGND noise from modulating the feedback signal. All FB and COMP components must reference AGND, not PGND or system GND.
MPQ3426DL-AEC1-LF-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 14-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Up
- Output Configuration:
- Positive
- Topology:
- Boost
- Output Type:
- Programmable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3.2V
- Voltage - Input (Max):
- 22V
- Voltage - Output (Min/Fixed):
- 3.2V
- Voltage - Output (Max):
- 35V
- Current - Output:
- 6A
- Frequency - Switching:
- 300kHz ~ 2MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-QFN (3x4)
MPQ3426DL-AEC1-LF-P FAQ
1.How can I place an order for MPQ3426DL-AEC1-LF-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MPQ3426DL-AEC1-LF-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MPQ3426DL-AEC1-LF-P reliable?
The price and inventory of MPQ3426DL-AEC1-LF-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MPQ3426DL-AEC1-LF-P is usually 5 days.
3.What payment methods are accepted for MPQ3426DL-AEC1-LF-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MPQ3426DL-AEC1-LF-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MPQ3426DL-AEC1-LF-P?
MPQ3426DL-AEC1-LF-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MPQ3426DL-AEC1-LF-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MPQ3426DL-AEC1-LF-P?
For technical support, including MPQ3426DL-AEC1-LF-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MPQ3426DL-AEC1-LF-P requirements.
6.How does Aetrix verify that MPQ3426DL-AEC1-LF-P is sourced from the original manufacturer or authorized distributors?
All MPQ3426DL-AEC1-LF-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MPQ3426DL-AEC1-LF-P meets industry standards.
7.What is the process for return or replacement of MPQ3426DL-AEC1-LF-P?
All MPQ3426DL-AEC1-LF-P units undergo pre-shipment inspection (PSI). If there is an issue with MPQ3426DL-AEC1-LF-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MPQ3426DL-AEC1-LF-P part is unused and in its original packaging.
Return procedure for MPQ3426DL-AEC1-LF-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MPQ3426DL-AEC1-LF-P Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

