Monolithic Power Systems Inc. MPQ3428AGL-AEC1-P

Overview

MPQ3428AGL-AEC1-P from Monolithic Power Systems is an AEC-Q100 Grade 1 qualified synchronous boost converter IC designed for automotive power rail generation, featuring fixed 600kHz switching frequency, 3V–20V input range, 19A internal switch current limit, integrated 18mΩ low-side MOSFET, and input disconnect functionality. It delivers regulated output up to 22V in eCall and telematics systems where input isolation during fault conditions is critical.

For engineers reviewing the MPQ3428AGL-AEC1-P datasheet, MPQ3428AGL-AEC1-P pinout, MPQ3428AGL-AEC1-P application, or MPQ3428AGL-AEC1-P equivalent, key selection criteria include its programmable input average current limit (54mV threshold), thermal shutdown at 150°C, <1µA shutdown current, external soft-start control, and QFN-22 (3mm×4mm) package with exposed thermal pad.

Technical Context

The MPQ3428AGL-AEC1-P implements a constant-frequency peak-current-mode control architecture with dual current-sensing options: internal sensing (CLDR tied to PGND) or external resistor-based average current limiting (CLDR floating). Its error amplifier features 300 V/V gain and 160 µA/V transconductance, enabling stable loop compensation via the COMP pin.

It integrates a bootstrap-regulated 5V SDR driver for synchronous rectification, supports linear charge mode startup with 0.5ms SCP blanking time, and provides dual protection layers-hiccup-mode OCP when VOUT ≤ VIN and immediate SCP shutdown if sensed inductor current exceeds 100mV/RSENSE. Thermal regulation triggers shutdown at 150°C with 25°C hysteresis.

Key Specifications

Pinout & Package

MPQ3428AGL-AEC1-P is housed in a thermally enhanced QFN-22 (3mm × 4mm, 0.5mm pitch) package with exposed thermal pad (Pin 13 = AGND, Pin 16 = PGND, Pin 22 = PGND). The package supports automated optical inspection and meets IPC-7351B standard footprint.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous boost converter applications.

Compared with LM5122MQ/NOPB and TPS61088RHLR, MPQ3428AGL-AEC1-P uniquely combines AEC-Q100 Grade 1 qualification, integrated input disconnect control, 20V input capability, and 19A switch rating - making it the only drop-in solution for safety-critical automotive boost applications requiring VIN-to-VOUT isolation.

Availability

MPQ3428AGL-AEC1-P is available at Aetrix Electronics and suitable for eCall systems, telematics control units, smart latch actuators, and infotainment display power supplies requiring stable component supply across automotive production lifecycles.

Supply support for MPQ3428AGL-AEC1-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MPQ3428A product line targets automotive power conversion applications demanding AEC-Q100 compliance, high efficiency, and functional safety features - specifically engineered for eCall, telematics, and infotainment subsystems operating in harsh environments.

FAQ

What is the purpose of the CLDR pin, and how does it enable input disconnect?

The CLDR pin drives the gate of an external N-channel MOSFET placed between VIN and the boost converter input. When the IC shuts down or detects an output short, CLDR pulls low, turning off the MOSFET and isolating the input source from the output rail. This satisfies automotive requirements for energy containment during fault conditions and prevents battery drain in sleep mode.

Can MPQ3428AGL-AEC1-P operate with input voltage below 3V?

No. The absolute minimum operating input voltage is 3V per datasheet specifications. Below this, the internal regulator cannot sustain VDD bias, and the device enters undervoltage lockout. During cold-crank events where battery dips to 2.5V, the 2.68V UVLO threshold ensures controlled shutdown before malfunction.

How is output voltage accuracy affected by FB resistor tolerance?

With a typical FB reference voltage of 1.225V ±13mV and standard 1% feedback resistors, total output voltage error is dominated by resistor ratio mismatch. For a 12V output using 100kΩ/10.2kΩ divider, ±1% resistor tolerance contributes ±0.12V error, while reference drift adds ±0.013V - resulting in ±1.1% total accuracy at room temperature.

Why does the MPQ3428AGL-AEC1-P use separate AGND and PGND pins?

AGND provides a quiet reference for analog circuits (error amplifier, FB comparator, UVLO), while PGND handles high di/dt return currents from the power switch and inductor. Separating them prevents ground noise coupling into sensitive nodes, ensuring stable regulation and accurate current sensing - especially critical in high-current automotive applications.

Is external compensation mandatory, or can the MPQ3428AGL-AEC1-P operate with internal compensation?

External compensation is mandatory. The COMP pin is not internally compensated; it requires an external RC network (resistor + capacitor to AGND) to set loop bandwidth and phase margin. Omitting this causes instability, oscillation, or poor transient response - confirmed by the functional block diagram and application notes specifying "connect capacitor and resistor in series to analog ground."

What happens during thermal shutdown, and how does recovery work?

When junction temperature reaches 150°C, the IC disables switching and pulls CLDR low. It remains latched off until temperature falls to 125°C (25°C hysteresis), then automatically resumes operation. No external reset is needed, enabling autonomous recovery in intermittently overloaded conditions like high-ambient telematics modules.

Does the MPQ3428AGL-AEC1-P support spread-spectrum frequency modulation?

No. The MPQ3428AGL-AEC1-P uses a fixed 600kHz oscillator with ±20% variation over temperature and process. It does not implement frequency dithering or spread-spectrum techniques. EMI reduction relies on optimized layout, QFN thermal pad grounding, and external LC filtering per the recommended application circuit.