Monolithic Power Systems Inc. MPQ4473GL-AEC1-Z

Overview

MPQ4473GL-AEC1-Z from Monolithic Power Systems is an AEC-Q100 Grade 1 qualified, synchronous step-down DC/DC converter delivering up to 3.5A continuous output current from a 4.5V–36V input. It integrates 40mΩ high-side and 20mΩ low-side MOSFETs, supports 200kHz–1MHz programmable switching frequency, and features 1% reference voltage accuracy (803–827mV) with fast transient response-designed for automotive power rails such as ADAS camera modules and infotainment domain controllers.

For engineers reviewing the MPQ4473GL-AEC1-Z datasheet, MPQ4473GL-AEC1-Z pinout, MPQ4473GL-AEC1-Z application, or MPQ4473GL-AEC1-Z equivalent, key selection criteria include its AEC-Q100 qualification, integrated dual-MOSFET architecture, programmable soft-start (8.5µA charging current), PGOOD open-drain output with 700µs delay, and thermal shutdown at 175°C with 45°C hysteresis.

Technical Context

The MPQ4473GL-AEC1-Z employs a current-mode PWM control architecture with feed-forward input-voltage compensation to maintain stable switching frequency across 4.5V–36V input range. Its proprietary dead-time control prevents shoot-through between integrated HS/LS MOSFETs, while cycle-by-cycle over-current protection triggers hiccup mode upon sustained current limit violation.

It operates in CCM at heavy loads and automatically transitions to skip mode at light loads to sustain high efficiency; the internal 5V LDO powers the BST driver, enabling low-dropout operation via bootstrap capacitor refresh when V_BST–V_SW falls below 2.3V.

Key Specifications

Pinout & Package

MPQ4473GL-AEC1-Z is housed in a thermally enhanced 3mm × 4mm, 20-pin QFN package with exposed thermal pads (pins 8, 19, 21–25) for PCB-level heat dissipation. The package supports θ_JA = 48°C/W on a 4-layer board per JESD51-7.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous step-down converter applications.

Compared with LM61480QRNXTQ1 and TPS54560QDGQRQ1, MPQ4473GL-AEC1-Z offers optimal balance of compact 3mm×4mm footprint, integrated dual-FETs, AEC-Q100 Grade 1 assurance, and skip-mode efficiency-making it ideal for space-constrained automotive subsystems where 3.5A is sufficient and thermal management is critical.

Availability

MPQ4473GL-AEC1-Z is available at Aetrix Electronics and suitable for automotive ADAS camera modules, infotainment domain controllers, and telematics control units requiring stable component supply with full AEC-Q100 traceability and long-term production support.

Supply support for MPQ4473GL-AEC1-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with global design centers and ISO/TS 16949-certified quality systems.

The MPQ4473 product line delivers AEC-Q100-qualified DC/DC converters optimized for automotive subsystems demanding high efficiency, fast transient response, and robust thermal performance in harsh environments.

FAQ

What is the minimum recommended output capacitance for stable operation with ceramic capacitors?

The MPQ4473GL-AEC1-Z requires external ramp compensation when using low-ESR ceramic output capacitors. For stability, select C_OUT ≥ 22µF with X5R/X7R dielectric and add R₄/C₄ network per Equation 4 in the datasheet. Minimum ESR should be avoided; instead, use ramp to achieve V_SLOPE1 ≈ 20–40V/ms.

Does MPQ4473GL-AEC1-Z support forced PWM mode, or is skip mode automatic?

MPQ4473GL-AEC1-Z operates exclusively in automatic mode: CCM at heavy loads and skip mode at light loads. There is no pin or register to force continuous PWM. The transition is seamless and internally managed by the current modulator detecting zero-inductor current.

How is the bootstrap capacitor charged during low-duty-cycle operation?

During low-duty-cycle (high-V_OUT/V_IN) operation, the MPQ4473GL-AEC1-Z uses an internal UVLO-controlled refresh circuit. When V_BST–V_SW drops below 2.3V, the LS-FET is briefly turned on to allow VIN–V_SW to recharge the BST capacitor, sustaining high-side gate drive.

Can the MPQ4473GL-AEC1-Z be used without an external frequency-setting resistor?

No. Pin 2 (FREQ) must be connected to GND through a resistor to set switching frequency. Leaving it floating or shorted causes undefined operation. Default frequency is not factory-trimmed; RFREQ values from 20kΩ to 150kΩ yield 1MHz to 200kHz per Equation 3.

What is the maximum allowable output voltage adjustment range?

The MPQ4473GL-AEC1-Z supports output voltages from 0.8V to 0.9×V_IN. At V_IN = 36V, maximum V_OUT = 32.4V; at V_IN = 4.5V, minimum regulated V_OUT = 0.8V. Below 0.8V, regulation is not guaranteed due to reference voltage floor.

Is the PGOOD signal actively driven or open-drain?

PGOOD is an open-drain NMOS output. It requires an external pull-up resistor (typically 10–100kΩ) to V_CC or another logic-rail voltage. It pulls LOW before startup and asserts HIGH only after V_FB ≥ 90% V_REF with ~700µs delay.

How does under-voltage protection (UVP) differ from under-voltage lockout (UVLO)?

UVLO monitors V_IN (thresholds: 4.0V rising / 3.1V falling) and disables the IC entirely. UVP monitors V_FB; if V_FB drops below 50% V_REF, it triggers hiccup-mode SCP to protect against output short circuits or severe overload-not input brownout.