Monolithic Power Systems Inc. MPQ4473GL-P

Overview

MPQ4473GL-P from Monolithic Power Systems is a fully integrated, AEC-Q100 Grade 1 qualified, synchronous step-down DC/DC converter delivering 3.5A continuous output current across 4.5V–36V input range, featuring internal 40mΩ/20mΩ MOSFETs, 1% reference voltage accuracy, and programmable soft-start for automotive power rail regulation.

For engineers reviewing the MPQ4473GL-P datasheet, MPQ4473GL-P pinout, MPQ4473GL-P application, or MPQ4473GL-P equivalent, this device supports fast-transient load response in automotive infotainment, ADAS camera modules, and industrial PoL systems where input voltage stability, thermal robustness, and functional safety compliance are critical selection criteria.

Technical Context

The MPQ4473GL-P employs a current-mode PWM architecture with feed-forward input-voltage compensation to maintain stable switching frequency (200kHz–1MHz) across wide VIN and load ranges. Its proprietary dead-time control prevents shoot-through between integrated high-side and low-side MOSFETs.

It integrates a 5V LDO for VCC bias, open-drain PGOOD with 700μs delay and 5% hysteresis, and cycle-by-cycle over-current protection with hiccup-mode short-circuit recovery triggered at <50% VREF. Thermal shutdown activates at 175°C with 45°C hysteresis.

Key Specifications

Pinout & Package

MPQ4473GL-P is housed in a thermally enhanced 3mm × 4mm, 20-pin QFN package with exposed thermal pad (pins 8, 19, 21–23 = IN; pins 9, 10, 17, 18, 24, 25 = SW; pins 11–16 = PGND).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous step-down converter applications.

Compared with MPQ4473GL-Z, MPQ4473GL-P offers identical performance in tray form for evaluation and NPI; versus MPQ4470GL-P, it adds AEC-Q100 Grade 1 qualification and 3.5A capability-critical for automotive safety-critical power rails.

Availability

MPQ4473GL-P is available at Aetrix Electronics and suitable for automotive camera modules, industrial PLC I/O supplies, ADAS radar processor rails, and networking mid-board power requiring stable component supply with AEC-Q100 assurance.

Supply support for MPQ4473GL-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MPQ4473 belongs to MPS's automotive-grade DC/DC converter product line, engineered specifically for demanding vehicular environments including engine bay, infotainment, and ADAS subsystems where reliability, thermal resilience, and functional safety alignment are foundational.

FAQ

What is the minimum recommended output capacitance for stable operation with ceramic capacitors?

The MPQ4473GL-P requires external ramp compensation when using low-ESR ceramic output capacitors. Minimum recommended output capacitance is 22μF, paired with an external ramp network (R4/C4) to ensure loop stability. Without ramp, POSCAPs with ≥12mΩ ESR may be used instead.

Does MPQ4473GL-P support forced PWM mode, or does it default to skip mode at light load?

The MPQ4473GL-P automatically enters skip mode at light loads to maintain high efficiency; it does not support forced PWM mode. The LS-FET driver enters high-Z state when inductor current reaches zero, and the current modulator limits reverse current to <−1mA to reduce quiescent current.

How is bootstrap capacitor charging maintained during high-duty-cycle operation?

During high duty cycles, BST charging time is reduced. The MPQ4473GL-P uses an internal UVLO-refresh circuit that forces LS-FET conduction when V_BST−V_SW drops below 2.3V, enabling bootstrap recharge. This allows stable operation down to V_OUT = 0.9×V_IN in low-dropout mode.

What is the maximum allowable input voltage ripple at 3.5A load and 500kHz switching frequency?

At 3.5A load and 500kHz, input voltage ripple is limited by CIN selection. For ≤100mV ripple at VIN=12V, a minimum 47μF X7R ceramic capacitor with ≥2A RMS rating is required. Equation (15) confirms ΔV_IN ≈ I_OUT/(4×f_SW×C_IN) - thus C_IN ≥ 3.5/(4×5e5×0.1) = 17.5μF.

Can the MPQ4473GL-P be used without an external ramp when outputting 3.3V with 10μH inductor and 100μF POSCAP?

Yes - POSCAP output capacitors with ≥12mΩ ESR generate sufficient natural ramp voltage to stabilize the control loop. With 10μH inductor and 100μF POSCAP, no external ramp (R4/C4) is needed; the ESR-induced V_FB slope meets stability requirements per Equation (7).

What is the typical enable propagation delay from EN rising edge to first switching cycle?

From EN rising above 1.2V to first HS-FET turn-on is typically 1.2ms, dominated by internal bandgap startup and soft-start capacitor charging. This delay is independent of SS capacitor value and ensures controlled power-up sequence before regulation begins.

Is the exposed thermal pad (EPAD) electrically connected to any internal node?

Yes - the EPAD is internally connected to PGND (pins 11–16). It must be soldered to a dedicated PCB thermal pad tied to the PGND plane with ≥6 thermal vias (0.3mm diameter) to achieve θ_JA = 48°C/W and sustain 3.5A continuous operation at +85°C ambient.