Monolithic Power Systems Inc. MPQ6541AGQKTE-AEC1-P

Overview

MPQ6541AGQKTE-AEC1 from Monolithic Power Systems is a three-phase BLDC motor power stage IC with integrated half-bridge drivers, six N-channel MOSFETs (15 mΩ HS/LS on-resistance), three current-sense amplifiers, and internal charge pump supporting 100% duty cycle operation. It delivers 8A continuous output current at 40V max input, features AEC-Q100 Grade 1 qualification, and targets automotive HVAC blower, EPS, and radiator fan control.

For engineers reviewing the MPQ6541AGQKTE-AEC1 datasheet, MPQ6541AGQKTE-AEC1 pinout, MPQ6541AGQKTE-AEC1 application, or MPQ6541AGQKTE-AEC1 equivalent, key selection criteria include its 4.75–40V operating range, integrated synchronous rectification, thermal shutdown behavior, and TQFN-26 wettable flank package for automated optical inspection.

Technical Context

The MPQ6541AGQKTE-AEC1 implements three independent half-bridge driver channels, each with dedicated EN/ PWM inputs (MPQ6541-AEC1 variant) and integrated gate drivers powered by an internal charge pump (VCP ≥ VIN + 5V) and low-side LDO (VG ≈ 5.5V). It supports automatic synchronous rectification during inductive flyback to minimize body-diode conduction loss.

Protection architecture includes per-phase over-current detection (HS OCP threshold = 10–19A, LS OCP = 17.5–25A), UVLO (4.4V typ), OVP (48V typ), and thermal shutdown at 150°C with 25°C hysteresis. Fault status is reported via open-drain nFAULT with deglitch time of 0.4 µs and auto-retry after 2 ms.

Key Specifications

Pinout & Package

MPQ6541AGQKTE-AEC1 uses a TQFN-26 (6mm × 6mm) package with wettable flanks for solder joint inspection. The exposed thermal pad must be connected to a solid GND plane via ≥9 thermal vias for optimal thermal performance (θJC = 12.8°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar three-phase BLDC motor driver applications.

Compared with MPQ6541AGQKTE-AEC1, MPQ6535AGRE-AEC1 trades current-sense integration and higher current capability for lower cost and smaller size, while DRV8305PAPR offers configurability at the expense of automotive qualification and embedded diagnostics - making MPQ6541AGQKTE-AEC1 optimal for production-grade AEC-Q100 systems requiring robust, self-contained motor control.

Availability

MPQ6541AGQKTE-AEC1 is available at Aetrix Electronics and suitable for automotive HVAC blower, electric power steering (EPS), and radiator fan control requiring stable component supply across multi-year vehicle production cycles.

Supply support for MPQ6541AGQKTE-AEC1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with over two decades of expertise in DC/DC converters, motor drivers, and automotive-qualified solutions.

The MPQ65xx product line delivers integrated three-phase power stages optimized for AEC-Q100 automotive applications, emphasizing high current density, embedded diagnostics, and robust thermal performance in compact packages.

FAQ

What is the maximum allowable PCB temperature rise for continuous 8A operation?

At 8A continuous per phase with 2-layer 2oz copper, the junction-to-ambient thermal resistance (θJA = 21.4°C/W) limits allowable ambient temperature to ≤75°C for TJ ≤125°C. With 4-layer PCB and thermal vias to internal GND planes, ambient can reach 105°C. Thermal simulation using JEDEC JESD51-7 test board data is recommended before final layout.

Can MPQ6541AGQKTE-AEC1 drive a PMSM motor using field-oriented control (FOC)?

Yes - its three matched current-sense amplifiers (SOA/SOB/SOC) provide simultaneous, low-offset phase current feedback required for FOC algorithms. The 1/11600 typical gain and ±25 µA offset enable 12-bit ADC resolution down to ~0.1A, supporting precise torque and flux vector estimation in real time.

How does the automatic synchronous rectification behave during PWM dead-time?

During dead-time (when both HS and LS FETs are off), the device monitors SA/SB/SC voltage. If any output falls below GND, the corresponding LS-FET turns on until current decays near zero; if it rises above VIN, the HS-FET activates. This occurs within nanoseconds and eliminates body-diode conduction without requiring external timing control.

What external capacitors are mandatory for stable operation?

Four capacitors are mandatory: (1) 4.7–10 µF X7R ceramic from VG to GND; (2) 1 µF X7R from VCP to VIN; (3) 100 nF X7R between CP1 and CP2; (4) bulk input capacitance ≥47 µF low-ESR electrolytic or polymer near VIN pins. All must be placed within 2 mm of respective pins per MPS layout guidelines.

Is nFAULT asserted during UVLO condition, and how is recovery handled?

Yes - nFAULT is actively pulled low during UVLO (VIN < 4.4V), OVP (VIN > 48V), thermal shutdown, or OCP events. Recovery is automatic: once VIN rises above UVLO threshold + hysteresis (4.87V), all functions resume after ~1 ms power-up delay; no reset pulse is required.

Does the device support 100% duty cycle operation, and how is high-side gate drive sustained?

Yes - the internal charge pump generates VCP ≥ VIN + 5V and includes a trickle-charge circuit that maintains gate voltage during 100% duty cycle. This eliminates reliance on bootstrap capacitor recharge through low-side conduction, enabling true DC output and regenerative braking modes.

What is the recommended termination network for SOA/SOB/SOC when interfacing with a 3.3V ADC?

Connect a 5.1 kΩ resistor from each SOx pin to a 1.65V reference (mid-supply of 3.3V ADC). This yields ±0.5V swing around 1.65V for ±5.7A phase current, matching ADC full-scale range. Avoid direct connection to VDD or GND - the current-output nature requires proper biasing to prevent saturation.