Monolithic Power Systems Inc. MPQ8632GL-8-Z
- Part No.:
- MPQ8632GL-8-Z
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 13-VFQFN
- Datasheet:
-
MPQ8632GL-8-Z.pdf
- Description:
- IC REG BUCK ADJ 8A 13QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MPQ8632GL-8-Z from Monolithic Power Systems is an 8A synchronous step-down DC/DC converter with 2.5V–18V input range, Constant-On-Time (COT) control, non-latch over-voltage protection, and 0.611V–13V adjustable output voltage. It integrates high- and low-side MOSFETs in a 16-pin QFN 3mm×4mm package and delivers fast transient response for telecom power rails and server point-of-load regulation.
For engineers reviewing the MPQ8632GL-8-Z datasheet, MPQ8632GL-8-Z pinout, MPQ8632GL-8-Z application, or MPQ8632GL-8-Z equivalent, key selection criteria include its 8A continuous output rating, programmable 200kHz–1MHz switching frequency via external resistor, 0.5% reference voltage accuracy over –40°C to +125°C, and integrated thermal shutdown with 150°C trip point.
Technical Context
The MPQ8632GL-8-Z implements adaptive COT control with feed-forward compensation, enabling stable operation across wide input voltage variations while maintaining near-constant switching frequency. Its internal 4.8V VCC LDO powers gate drivers, and bootstrap circuitry supports high-side MOSFET drive without external charge pumps.
It features dual-stage current limiting: valley-current OCP (9.5–12.5A typical) and peak-current limit (13–21.6A), plus non-latch OVP at 117–123% of VFB and UVP at 47–53% of VFB. The open-drain PG signal asserts after 2.5ms delay when output reaches 91% of target.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 8A continuous - supports high-density point-of-load conversion in space-constrained telecom and server boards. |
| Input Voltage Range | 2.5V–18V with 5V external bias; 4.5V–18V with internal bias - enables flexible rail sourcing from battery or intermediate bus. |
| Switching Frequency | 200kHz–1MHz, resistor-programmable via FREQ pin - balances efficiency vs. component size; feed-forward maintains stability across VIN variation. |
| Reference Voltage | 611mV ±3mV (–40°C to +125°C) - ensures tight output regulation under thermal stress in industrial environments. |
| OVP Mode | Non-latch - allows automatic recovery after overvoltage event without system reset, critical for uninterrupted network equipment operation. |
| Thermal Shutdown | 150°C with 25°C hysteresis - prevents permanent damage during sustained overload or poor PCB thermal design. |
| Package | 16-pin QFN 3mm×4mm, 0.5mm pitch - compatible with standard reflow profiles and supports high-current PCB layout with multiple PGND/SW pins. |
Pinout & Package
The MPQ8632GL-8-Z uses a thermally enhanced 16-pin QFN (3mm × 4mm, 0.5mm pitch) with exposed thermal pad. Pin 1 is EN; pins 9 and 14 are VIN; pins 10–13 are PGND; pins 15–16 are SW; and pin 7 is VCC (4.8V LDO output).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 EN | Enable control input | Digital logic-level input; pull-up to VIN enables startup; hysteresis of 250mV prevents chatter near threshold. |
| 2 FREQ | Frequency programming node | Resistor-to-VIN sets ON-time; feed-forward compensation stabilizes fSW across input voltage range. |
| 3 FB | Feedback sensing input | Monitors resistive divider output; sets VOUT = 0.611V × (1 + R1/R2); also triggers OVP/UVP protection. |
| 4 SS | Soft-start timing capacitor | External capacitor controls output ramp rate; prevents inrush current into downstream capacitance. |
| 5 AGND | Analog ground reference | Separate ground for control circuitry; must be star-connected to PGND to avoid noise coupling into feedback path. |
| 6 PG | Power-good open-drain output | Asserts high after 2.5ms when VOUT ≥ 91% of target; requires external pull-up for system sequencing. |
| 7 VCC | Internal 4.8V LDO output | Powers gate drivers and logic; bypassed with ≥1μF X7R ceramic; disabled when 5V external bias applied. |
| 8 BST | Bootstrap supply node | Connects to SW via 0.1μF ceramic; forms floating supply for high-side driver; critical for reliable HS-FET turn-on. |
| 9,14 VIN | Main power input | Accepts 2.5V–18V (with external bias) or 4.5V–18V (internal bias); requires low-ESR bulk and ceramic decoupling. |
| 10–13 PGND | Power ground return | High-current return path for both MOSFETs and inductor; must use wide copper pours and multiple vias to minimize impedance. |
| 15,16 SW | Switch node output | Drives external inductor; swings from VIN to ~–1V during dead-time; connects directly to BST capacitor and inductor. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Power Stage | Optimized 19.6mΩ HS-RDS(ON) and 5.7mΩ LS-RDS(ON) at 25°C - reduces conduction loss and thermal rise at 8A load. |
| Adaptive COT Control | Eliminates external compensation network - simplifies design and improves transient response to load steps up to 4A/μs. |
| Pre-bias Start-up | Allows safe start into pre-charged output - prevents reverse current flow and protects downstream circuits during hot-swap events. |
| Programmable Soft Start | Capacitor-controlled ramp time - avoids overshoot and enables controlled power sequencing in multi-rail systems. |
| Proprietary Switching Loss Reduction | Minimizes dead-time losses and shoot-through risk - maintains >92% peak efficiency at 12VIN/1VOUT/8A. |
Applications
| Telecom Power Supply | Server Point-of-Load |
|---|---|
Use Scenario: Provides 1.2V/8A core voltage to FPGA or ASIC in 48V-powered telecom line cards with strict thermal and EMI constraints. IC Role / Device Role / Timing Role: Primary buck regulator delivering tightly regulated, low-noise supply with fast load-step response (<10μs recovery). Use Value: Enables compact board layout using 1μH inductor and eliminates need for external compensation components. | Use Scenario: Generates 0.85V/8A CPU core rail in 1U server motherboard where airflow is limited and thermal margin is critical. IC Role / Device Role / Timing Role: High-efficiency step-down converter operating in CCM at 500kHz, synchronized to system clock via FREQ pin. Use Value: Delivers >93% efficiency at full load while maintaining junction temperature below 105°C with 200LFM airflow. |
| Base Station RF Module | Distributed Power System |
Use Scenario: Powers RF transceiver ICs requiring ultra-low noise and precise voltage tracking in outdoor macro base stations. IC Role / Device Role / Timing Role: Secondary buck stage regulating from 5V intermediate bus to 3.3V/8A for analog front-end and DACs. Use Value: 0.5% reference accuracy and <1% load regulation ensure consistent RF performance across temperature and aging. | Use Scenario: Scales power delivery across modular compute blades in edge AI servers, where identical footprints simplify inventory and layout reuse. IC Role / Device Role / Timing Role: Member of MPQ8632 family sharing 3mm×4mm footprint with 4A–12A variants - enables BOM consolidation and design flexibility. Use Value: Identical PCB land pattern supports field upgrades from 6A to 8A without redesign, reducing NRE and time-to-market. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPQ8632GLE-10 | 10A rated, same 3mm×4mm QFN package, identical pinout and control architecture | Higher current headroom for future-proofing or derated operation at elevated ambient temperatures | Select when long-term reliability at >85°C ambient or transient surge margin >2A is required. |
| RTQ2132BGQW | 8A rated, 16-pin QFN 3mm×4mm, but uses current-mode control and fixed 600kHz fSW | Lacks programmable frequency and COT's ultrafast transient response; requires external compensation | Choose only if system-level timing synchronization mandates fixed-frequency operation and compensation network is acceptable. |
Compared with MPQ8632GL-8-Z, the MPQ8632GLE-10 offers higher current capability in identical footprint for seamless upgrade paths, while RTQ2132BGQW trades adaptive COT responsiveness for simpler fixed-frequency control-making the MPQ8632GL-8-Z optimal for dynamic load environments like FPGA-based accelerators.
Availability
MPQ8632GL-8-Z is available at Aetrix Electronics and suitable for telecom infrastructure, server power delivery, and distributed computing systems requiring stable component supply, RoHS-compliant packaging, and long-lifecycle support.
Supply support for MPQ8632GL-8-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with global manufacturing and quality certifications including ISO 9001 and IATF 16949.
The MPQ8632 family targets high-density, high-efficiency DC/DC conversion in telecom, enterprise computing, and industrial systems-designed to replace discrete buck controllers and external MOSFETs with fully integrated, thermally optimized solutions.
FAQ
What is the minimum recommended input voltage for MPQ8632GL-8-Z when using internal bias?
The minimum input voltage is 4.5V when relying on the internal 4.8V VCC LDO. Below this, the internal bias cannot sustain gate drive; applying a 5V external bias to VCC enables operation down to 2.5V input, as confirmed in the Absolute Maximum Ratings table and Recommended Operating Conditions section.
How does the non-latch OVP behavior affect system recovery after an overvoltage event?
Non-latch OVP disables the high-side switch until the FB voltage falls below 117% of VREF, then automatically resumes normal regulation without requiring an EN toggle or power cycle. This enables graceful recovery in systems where transient overvoltage (e.g., load dump) must not trigger full system reset.
Can MPQ8632GL-8-Z operate with ceramic output capacitors only, or is an ESR-based capacitor required?
It operates reliably with low-ESR ceramic capacitors alone. The adaptive COT architecture and internal slope compensation eliminate the need for ESR-dependent ripple; however, adding a small POSCAP (e.g., 10μF, 20mΩ ESR) can improve light-load stability in skip mode per Figure 6 analysis in the datasheet.
What is the purpose of the AGND and PGND separation, and how should they be connected on the PCB?
AGND serves as the quiet reference for feedback, soft-start, and reference circuits; PGND carries high di/dt return currents from SW and VIN. They must connect at a single point near the IC's thermal pad to prevent noise coupling-never tie them together via traces or planes elsewhere on the board.
Is the MPQ8632GL-8-Z pin-compatible with other members of the MPQ8632 family?
Yes-MPQ8632GLE-4, -6, -8, -10, -12, and MPQ8632HGLE-10 share identical 16-pin QFN 3mm×4mm footprints and pin assignments. Only the GVE-15/GVE-20 variants use the larger 29-pin QFN and differ electrically in RDS(ON) and current limits.
What thermal derating applies when operating above 25°C ambient temperature?
With θJA = 46°C/W (QFN 3×4mm), maximum allowable power dissipation drops linearly: PD(MAX) = (150°C − TA)/46. At 70°C ambient, max continuous power is 1.74W; at 85°C, it falls to 1.41W-requiring careful layout and airflow to maintain 8A output without thermal shutdown.
MPQ8632GL-8-Z Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 13-VFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.611V
- Voltage - Output (Max):
- 13V
- Current - Output:
- 8A
- Frequency - Switching:
- 200kHz ~ 1MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 13-QFN (3x4)
MPQ8632GL-8-Z FAQ
1.How can I place an order for MPQ8632GL-8-Z through Aetrix?
Please submit a Request for Quotation (RFQ) for MPQ8632GL-8-Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MPQ8632GL-8-Z reliable?
The price and inventory of MPQ8632GL-8-Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MPQ8632GL-8-Z is usually 5 days.
3.What payment methods are accepted for MPQ8632GL-8-Z?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MPQ8632GL-8-Z transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MPQ8632GL-8-Z?
MPQ8632GL-8-Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MPQ8632GL-8-Z order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MPQ8632GL-8-Z?
For technical support, including MPQ8632GL-8-Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MPQ8632GL-8-Z requirements.
6.How does Aetrix verify that MPQ8632GL-8-Z is sourced from the original manufacturer or authorized distributors?
All MPQ8632GL-8-Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MPQ8632GL-8-Z meets industry standards.
7.What is the process for return or replacement of MPQ8632GL-8-Z?
All MPQ8632GL-8-Z units undergo pre-shipment inspection (PSI). If there is an issue with MPQ8632GL-8-Z, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MPQ8632GL-8-Z part is unused and in its original packaging.
Return procedure for MPQ8632GL-8-Z:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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