Monolithic Power Systems Inc. MPQ8632GLE-10-P
- Part No.:
- MPQ8632GLE-10-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 16-PowerVFQFN
- Datasheet:
-
MPQ8632GLE-10-P.pdf
- Description:
- IC REG BUCK ADJ 10A 16QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MPQ8632GLE-10-P from Monolithic Power Systems is a 10A synchronous step-down DC/DC converter with 2.5V–18V input range, latch-off over-voltage protection, and Constant-On-Time (COT) control architecture. It delivers up to 10A output current in a 3mm×4mm QFN-16 package, supports programmable 200kHz–1MHz switching frequency, and integrates high- and low-side MOSFETs with RDS(ON) of 19.6mΩ/5.7mΩ. It is used in telecom base station power rails requiring fast transient response and tight output regulation.
For engineers reviewing the MPQ8632GLE-10-P datasheet, MPQ8632GLE-10-P pinout, MPQ8632GLE-10-P application, or MPQ8632GLE-10-P equivalent, key selection criteria include latch-off OVP mode, 10A continuous output rating, COT-based transient performance, thermal shutdown at 150°C, and compatibility with 0.611V–13V adjustable output voltage configurations.
Technical Context
The MPQ8632GLE-10-P implements adaptive Constant-On-Time (COT) control without an external compensation network, using input voltage feed-forward via the FREQ pin to maintain stable switching frequency across input variations. Its internal high-side and low-side MOSFETs are optimized for 10A operation, with dead-time control preventing shoot-through during transitions.
It operates in PWM mode under continuous conduction (CCM) and automatically enters skip-mode DCM at light loads to improve efficiency. The latch-off OVP mode triggers permanent shutdown upon over-voltage detection-distinct from non-latch variants-and requires manual reset via EN pin cycling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 10A continuous - supports high-density server and networking point-of-load designs without external current sharing. |
| Input Voltage Range | 2.5V–18V with external 5V bias - enables direct operation from 3.3V auxiliary rails or wide-input industrial supplies. |
| OVP Mode | Latch-off - ensures system-level fault containment by disabling output until enable signal is cycled; prevents uncontrolled re-start after over-voltage events. |
| Switching Frequency | 200kHz–1MHz (programmable via FREQ resistor) - balances inductor size (e.g., 1µH typical) and efficiency across load conditions. |
| RDS(ON) (HS/Low-Side) | 19.6mΩ / 5.7mΩ at TJ=25°C - minimizes conduction loss at full 10A load, enabling >92% peak efficiency at 12VIN/1VOUT. |
| Reference Voltage | 0.611V ±0.009V (–40°C to +125°C) - enables precise 1% output accuracy with standard resistor dividers, critical for CPU/GPU core rail stability. |
| Thermal Shutdown | 150°C with 25°C hysteresis - provides robust thermal protection while allowing safe recovery without external intervention. |
Pinout & Package
MPQ8632GLE-10-P is housed in a thermally enhanced 16-pin QFN package (3mm × 4mm, 0.5mm pitch) with exposed thermal pad. Pin 1 is marked by a dot; pins 9 and 14 are parallel IN inputs; pins 10–13 are dedicated PGND terminals; pins 15–16 are paralleled SW outputs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 EN | Enable control input | Digital logic-level input (1.3V threshold); must be pulled high via resistor divider for automatic startup; floating prohibited. |
| 2 FREQ | Frequency programming node | Connects to IN via resistor (e.g., 453kΩ for 500kHz); enables line feed-forward to stabilize switching frequency vs. VIN variation. |
| 3 FB | Feedback sensing input | Monitors output via resistor divider; sets VOUT = 0.611V × (1 + R1/R2); also triggers latch-off OVP when VFB exceeds 130% of reference. |
| 4 SS | Soft-start timing capacitor node | External capacitor (e.g., 33nF) controls output voltage ramp rate; prevents inrush current and stabilizes startup into pre-biased loads. |
| 5 AGND | Analog ground reference | Separate ground for control circuitry; must be connected to PGND at single point near IC to avoid noise coupling into feedback path. |
| 6 PG | Open-drain power-good indicator | Asserts high when VOUT ≥ 90% nominal (e.g., 0.9×0.611V at FB); requires external 100kΩ pull-up; includes 2.5ms delay for glitch immunity. |
| 7 VCC | Internal 4.8V LDO output | Powers gate drivers and control logic; can be disabled by applying 5V externally to reduce quiescent current; decouple with ≥1µF X7R ceramic. |
| 8 BST | Bootstrap supply for high-side driver | Requires ceramic capacitor (e.g., 0.1µF) between BST and SW; forms floating rail to fully enhance HS-FET during ON time. |
| 9,14 IN | Main power input | Parallel inputs accept 2.5V–18V; require low-ESR bulk capacitance near pins; wide copper pours and multiple vias mandatory for thermal and current handling. |
| 10–13 PGND | Power ground return | Four dedicated ground pins minimize IR drop and thermal resistance; must connect directly to PCB ground plane with minimal trace length. |
| 15–16 SW | Switch node output | Paralleled outputs drive external inductor; swing from ~0V to VIN; layout demands short, wide traces and tight coupling to BST/PGND for EMI control. |
Key Features
| Feature | Design Value |
|---|---|
| Latch-off over-voltage protection | Shuts down permanently on VFB > 130% VREF; prevents repeated fault cycling in safety-critical telecom infrastructure. |
| Adaptive COT control | Eliminates need for external loop compensation components while delivering <10µs load transient response at 10A step change. |
| Pre-bias start-up capability | Allows safe startup into pre-charged output capacitors without reverse current flow or output overshoot. |
| Integrated 10A MOSFET power stage | Combines 19.6mΩ HS and 5.7mΩ LS switches in single die; reduces BOM count and layout complexity versus controller+external FET solutions. |
| Programmable soft-start time | Adjustable via SS capacitor (e.g., 10nF → ~2ms, 100nF → ~20ms); enables sequencing compliance in multi-rail systems. |
Applications
| Telecom Base Station RF Power Amplifier Supply | Enterprise Server Core Voltage Rail |
|---|---|
|
Use Scenario: Powers GaN-based RF power amplifiers in 5G macro base stations requiring clean, tightly regulated 5V or 12V rails with fast transient response to burst-mode traffic. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering 10A at 5V; manages dynamic load steps up to 8A/µs via COT control. Use Value: Latch-off OVP prevents catastrophic failure during antenna mismatch events; integrated MOSFETs eliminate discrete FET layout sensitivity. |
Use Scenario: Supplies CPU/GPU core voltage (e.g., 0.8V–1.2V) in dual-socket rack servers where space, thermal density, and reliability are critical. IC Role / Device Role / Timing Role: Point-of-load (POL) converter operating in CCM at full load; uses programmable frequency to avoid AM band interference. Use Value: 0.611V reference with ±0.009V tolerance enables 1% output accuracy; pre-bias start-up supports hot-swap module insertion. |
| Industrial Edge AI Accelerator Board | Distributed Power System for Network Switches |
|
Use Scenario: Powers FPGA or ASIC accelerators on compact edge inference modules with limited board area and strict thermal budgets. IC Role / Device Role / Timing Role: High-current POL regulator with thermal shutdown at 150°C; operates in skip-mode DCM at idle to extend fanless operation. Use Value: 3mm×4mm QFN footprint saves >40% area vs. discrete solutions; exposed thermal pad enables direct heatsink attachment. |
Use Scenario: Generates intermediate 5V or 3.3V rails in modular network switches with redundant power inputs and strict uptime requirements. IC Role / Device Role / Timing Role: Secondary buck converter fed from 12V backplane; uses PG signal for system-level power sequencing and fault reporting. Use Value: Open-drain PG output interfaces directly with microcontroller GPIOs; latch-off OVP ensures no autonomous restart after input surge events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPQ8632HGLE-10 | Same 10A rating and 3mm×4mm QFN package but features non-latch OVP mode and higher peak current limit (10–16A vs. 13–21.6A). | Suitable for systems requiring automatic recovery after over-voltage faults, such as consumer-grade storage controllers. | Select HGLE-10 only if latch-off behavior is undesirable; verify OVP reset strategy aligns with system safety architecture. |
| MPQ8632GLE-12 | Shares identical pinout and package but rated for 12A output; lower RDS(ON) (5.2mΩ LS) and higher valley current limit (12–18A). | Used where future-proofing for higher load or margin against derating is required, e.g., in modular compute blades. | GLE-12 offers headroom for thermal or aging derating but increases cost; confirm layout and thermal design support 12A continuous. |
Compared with MPQ8632HGLE-10, the MPQ8632GLE-10-P's latch-off OVP provides deterministic fault containment, while compared with MPQ8632GLE-12, it trades 2A headroom for tighter cost and thermal optimization at nominal 10A loads.
Availability
MPQ8632GLE-10-P is available at Aetrix Electronics and suitable for telecom base station power supplies, enterprise server core rails, industrial edge AI accelerators, and distributed network switch systems requiring stable component supply and long-term manufacturability.
Supply support for MPQ8632GLE-10-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with over two decades of expertise in DC/DC conversion, motor drivers, and LED lighting controllers.
The MPQ8632 family was designed specifically for high-current, space-constrained point-of-load applications in telecom, computing, and industrial infrastructure-emphasizing integration, thermal efficiency, and robust fault protection.
FAQ
What is the difference between MPQ8632GLE-10 and MPQ8632HGLE-10?
The MPQ8632GLE-10 implements latch-off over-voltage protection, requiring manual EN pin reset after an OVP event, whereas MPQ8632HGLE-10 uses non-latch OVP and auto-recovers. Both share the same 10A rating, 3mm×4mm QFN package, and pinout-but GLE-10 has a higher peak current limit (13–21.6A) and is specified for latch-off operation per datasheet Rev.1.27.
Can MPQ8632GLE-10-P operate with a 3.3V input supply?
Yes-MPQ8632GLE-10-P supports 2.5V–18V input when powered with an external 5V bias applied to the VCC pin. Without external bias, the minimum input is 4.5V due to internal LDO requirements. For 3.3V operation, tie a clean 5V rail to VCC and route the 3.3V source to IN.
How is the switching frequency set, and does it vary with input voltage?
Switching frequency is set by a resistor (RFREQ) between FREQ and IN pins, with typical values ranging from 200kHz (1.2MΩ) to 1MHz (182kΩ). Due to feed-forward compensation, the frequency remains nearly constant across input voltage changes-verified in datasheet Figure 13 showing <±3% variation from 4.5V to 18V at 500kHz setting.
What is the recommended layout practice for the PGND and AGND connections?
AGND must connect to the PGND plane at a single point adjacent to the IC's thermal pad, avoiding shared traces or vias with noisy power paths. All four PGND pins (10–13) should route directly to a solid inner ground plane using multiple 0.3mm vias; AGND (pin 5) connects only to that local star point-not to remote ground islands or analog sensor returns.
Does MPQ8632GLE-10-P support forced PWM mode to eliminate frequency variation at light loads?
No-MPQ8632GLE-10-P operates exclusively in adaptive COT mode and automatically transitions between PWM (CCM) and skip-mode (DCM) based on load. There is no pin or register to force continuous PWM; light-load efficiency is achieved via controlled pulse skipping, not fixed-frequency operation.
What is the maximum allowable output voltage, and how is it set?
The maximum output voltage is 13V, set by the feedback resistor divider on the FB pin. With VREF = 0.611V, VOUT = 0.611V × (1 + R1/R2); selecting R1 = 200kΩ and R2 = 10kΩ yields 12.83V. Exceeding 13V risks triggering OVP or violating absolute maximum ratings on internal circuitry.
Is the thermal pad electrically connected, and how should it be handled in PCB design?
Yes-the exposed thermal pad is internally connected to PGND and must be soldered to a dedicated PCB ground plane. Use a 3×3 array of thermal vias (0.3mm diameter, 0.6mm pitch) filled with solder or conductive epoxy, and ensure ≥70% copper coverage beneath the pad to achieve θJA ≤ 46°C/W as specified.
MPQ8632GLE-10-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 16-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.611V
- Voltage - Output (Max):
- 13V
- Current - Output:
- 10A
- Frequency - Switching:
- 200kHz ~ 1MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (3x4)
MPQ8632GLE-10-P FAQ
1.How can I place an order for MPQ8632GLE-10-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MPQ8632GLE-10-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MPQ8632GLE-10-P reliable?
The price and inventory of MPQ8632GLE-10-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MPQ8632GLE-10-P is usually 5 days.
3.What payment methods are accepted for MPQ8632GLE-10-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MPQ8632GLE-10-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MPQ8632GLE-10-P?
MPQ8632GLE-10-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MPQ8632GLE-10-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MPQ8632GLE-10-P?
For technical support, including MPQ8632GLE-10-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MPQ8632GLE-10-P requirements.
6.How does Aetrix verify that MPQ8632GLE-10-P is sourced from the original manufacturer or authorized distributors?
All MPQ8632GLE-10-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MPQ8632GLE-10-P meets industry standards.
7.What is the process for return or replacement of MPQ8632GLE-10-P?
All MPQ8632GLE-10-P units undergo pre-shipment inspection (PSI). If there is an issue with MPQ8632GLE-10-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MPQ8632GLE-10-P part is unused and in its original packaging.
Return procedure for MPQ8632GLE-10-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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