Monolithic Power Systems Inc. MPQ8632GLE-12-P
- Part No.:
- MPQ8632GLE-12-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 16-PowerVFQFN
- Datasheet:
-
MPQ8632GLE-12-P.pdf
- Description:
- IC REG BUCK ADJ 12A 16QFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,583
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MPQ8632GLE-12-P from Monolithic Power Systems is a 12A synchronous step-down DC/DC converter with 2.5V–18V input range, 0.611V–13V adjustable output, non-latch over-voltage protection, and Constant-On-Time (COT) control for ultrafast transient response. It integrates high- and low-side MOSFETs in a 3mm×4mm QFN-16 package and targets high-density power rails in telecom base stations and server VRMs.
For engineers reviewing the MPQ8632GLE-12-P datasheet, MPQ8632GLE-12-P pinout, MPQ8632GLE-12-P application, or MPQ8632GLE-12-P equivalent, key selection criteria include verified 12A continuous output capability, 19.6mΩ high-side RDS(ON), programmable 200kHz–1MHz switching frequency via FREQ pin, and non-latch OVP mode confirmed in Rev.1.27 documentation.
Technical Context
The MPQ8632GLE-12-P implements adaptive COT control without an external compensation network, using input voltage feed-forward through the FREQ pin to maintain stable switching frequency across input variations. Its internal 4.8V VCC LDO powers gate drivers and control logic, while bootstrap circuitry enables high-side N-channel MOSFET operation.
It operates in PWM mode under continuous conduction (CCM) at full load and transitions to diode-emulation DCM with tri-state low-side driver at light loads, achieving high efficiency down to 1mA. Protection includes non-latch over-current (12–18A peak), thermal shutdown at 150°C, and 86–94% VFB power-good assertion with 2.5ms delay.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 12A continuous - supports single-rail CPU/GPU core supplies without parallel devices |
| Input Voltage Range | 2.5V–18V - compatible with 3.3V, 5V, 12V intermediate bus architectures when biased externally |
| Output Voltage Range | 0.611V–13V - covers DDR memory, FPGA I/O, and ASIC core rails via resistor divider on FB pin |
| High-Side RDS(ON) | 19.6mΩ @ 25°C - reduces conduction loss at 12A, enabling >92% efficiency at 12VIN/1VOUT |
| Switching Frequency | 200kHz–1MHz - set by external RFREQ resistor; higher frequencies allow smaller magnetics but increase switching loss |
| OVP Mode | Non-latch - recovers automatically after fault removal, suitable for systems requiring uninterrupted operation |
| Reference Voltage | 611mV ±9mV (–40°C to +125°C) - enables precise output regulation with <±1% error over full temperature range |
Pinout & Package
MPQ8632GLE-12-P uses a thermally enhanced 3mm × 4mm QFN-16 package with exposed thermal pad (PGND-connected) and 0.5mm pitch. Pin 1 is EN; pins 9 and 14 are IN; pins 10–13 are PGND; pins 15–16 are SW; pin 7 is VCC; pin 8 is BST; pin 3 is FB; pin 4 is SS; pin 5 is AGND; pin 6 is PG; pin 2 is FREQ.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN (Pin 1) | Enable control input | Digital logic-level input; pull-up to IN enables automatic startup; hysteresis of 250mV prevents chatter near threshold |
| FREQ (Pin 2) | Frequency programming node | Resistor-to-IN sets ON-time; feed-forward stabilizes fSW vs. VIN; supports 200kHz–1MHz tuning |
| FB (Pin 3) | Output voltage feedback | Monitors resistive divider; reference = 611mV; also triggers OVP at 130% VFB (non-latch) |
| SS (Pin 4) | Soft-start timing | Capacitor-to-GND sets ramp time; prevents inrush current during power-up |
| AGND (Pin 5) | Analog ground reference | Separate from PGND to minimize noise coupling into feedback and control circuits |
| PG (Pin 6) | Power-good open-drain output | Asserts high when VOUT ≥ 90% nominal; 2.5ms delay ensures stable regulation before signaling |
| VCC (Pin 7) | Internal 4.8V LDO output | Powers gate drivers and bias circuits; can be disabled by external 5V supply to reduce dropout loss |
| BST (Pin 8) | Bootstrap supply for high-side driver | Requires ceramic capacitor between BST and SW; enables N-channel high-side MOSFET operation |
| IN (Pins 9, 14) | Main power input | Accepts 2.5V–18V; dual pins reduce IR drop and improve thermal spreading |
| PGND (Pins 10–13) | Power ground return | Multiple low-inductance paths for high di/dt switch currents; must connect to thermal pad |
| SW (Pins 15, 16) | Switch node output | Drives external inductor; dual pins lower parasitic inductance and improve EMI performance |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive COT control | Eliminates external loop compensation; delivers <10µs load transient recovery with no stability tuning required |
| Integrated MOSFETs | 19.6mΩ HS / 5.2mΩ LS RDS(ON) @ 25°C - reduces BOM count and PCB area vs. controller + discrete FET solutions |
| Programmable soft start | External capacitor sets monotonic VOUT ramp - prevents system reset during power sequencing |
| Pre-bias start-up | Allows safe turn-on when output is pre-charged - essential for hot-swap and multi-rail sequencing applications |
| Non-latch protection suite | OCP, OVP, and thermal shutdown recover automatically - avoids manual reset in mission-critical infrastructure |
Applications
| Telecom Base Stations | Servers & Data Center PSUs |
|---|---|
Use Scenario: Point-of-load conversion for remote radio units (RRUs) and digital signal processors in 4G/5G macro base stations. IC Role / Device Role / Timing Role: Primary 12A buck regulator delivering 0.85V–1.2V core voltage to FPGA and DSPs with tight transient response. Use Value: Adaptive COT control maintains <±2% output deviation during 8A/µs load steps, ensuring deterministic signal processing timing. | Use Scenario: Core voltage regulation for Intel Xeon or AMD EPYC CPUs in 1U/2U rack servers. IC Role / Device Role / Timing Role: High-current POL converter operating in CCM at 500kHz, synchronized to system clock for EMI reduction. Use Value: Dual SW and PGND pins lower layout-induced voltage spikes, reducing need for ferrite beads and improving ASIL-B compliance margin. |
| Personal Video Recorders | Flat Panel Displays |
Use Scenario: Powering SoC and DDR3/DDR4 memory subsystems in DVR/NVR units with fanless thermal design. IC Role / Device Role / Timing Role: Main 12A buck supplying 1.1V CPU core and 1.5V memory rails with independent soft-start sequencing. Use Value: Pre-bias start-up prevents brown-out during hot-plug storage events, eliminating video frame drops during recording. | Use Scenario: Backlight LED driver bias supply and TCON (timing controller) rail in 4K UHD LCD panels. IC Role / Device Role / Timing Role: Secondary 12A buck generating 3.3V/5V rails from 12V intermediate bus for display interface ICs. Use Value: Non-latch OVP prevents panel blackouts during ESD transients on HDMI or LVDS lines, improving field reliability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPQ8632GLE-10 | 10A rated; identical 3mm×4mm QFN-16 footprint and pinout; 19.6mΩ HS RDS(ON); latch-off OVP mode | Lower current rating limits use in >10A CPU cores; latch-off OVP requires external reset after fault | Select only if system peak load ≤10A and latch behavior is acceptable for safety architecture |
| MPQ8632HGLE-10 | 10A rated; same package; latch-off OVP; optimized for higher efficiency at light loads via modified valley current limit | Designed for always-on networking equipment; not validated for burst-mode server workloads | Prefer for low-power edge routers; avoid for high-dV/dt server VRMs due to unverified transient response at 12A-equivalent step loads |
Compared with MPQ8632GLE-10 and MPQ8632HGLE-10, the MPQ8632GLE-12-P provides verified 12A continuous delivery with non-latch OVP-critical for server and base station applications where automatic recovery from overvoltage events avoids system reboot and maintains uptime SLAs.
Availability
MPQ8632GLE-12-P is available at Aetrix Electronics and suitable for telecom base stations, server VRMs, and industrial embedded controllers requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for MPQ8632GLE-12-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and mixed-signal ICs for power management, motion control, and automotive applications.
The MPQ8632 family is designed for high-density, high-efficiency point-of-load conversion in infrastructure equipment, emphasizing thermal robustness, transient immunity, and minimal external component count.
FAQ
What is the maximum recommended PCB copper weight for the thermal pad of MPQ8632GLE-12-P?
The thermal pad must be connected to a minimum 2oz copper plane with ≥8 thermal vias (0.3mm diameter, filled or capped) to PGND. Using 3oz or 4oz inner-layer copper improves θJA by 3–5°C/W, critical for maintaining <125°C junction temperature at 12A full load in still air.
Can MPQ8632GLE-12-P operate with 2.5V input without external bias?
No. With internal bias only, minimum VIN is 4.5V. To achieve 2.5V operation, a clean 5V external supply must be applied to the VCC pin, disabling the internal LDO and enabling the low-VIN mode per datasheet Section 7.2.
How does the non-latch OVP behave during a sustained overvoltage event?
When FB exceeds 130% VREF, the high-side MOSFET disables and the low-side remains active to discharge the output. After VOUT falls below 116% VREF, the device automatically resumes switching within one cycle-no external reset or power cycle is needed.
Is the MPQ8632GLE-12-P pin-compatible with MPQ8632GLE-8?
Yes. All MPQ8632GLE-x variants (4A–12A) share identical 3mm×4mm QFN-16 footprints and pin assignments. Layout reuse is fully supported; only RDS(ON) and current-limit thresholds differ per variant.
What is the minimum recommended output capacitance for stable 12A operation?
A minimum of 4× 22µF X5R/X7R ceramic capacitors (total ≥88µF) is required at the output. These must be placed within 5mm of the SW and PGND pins, with direct low-inductance connections to minimize voltage ripple and ensure OCP accuracy.
Does MPQ8632GLE-12-P support forced PWM mode to eliminate frequency variation at light load?
No. It operates exclusively in adaptive COT mode-entering diode-emulation DCM at light loads to maximize efficiency. Forced PWM is not implemented; frequency naturally decreases below ~1A to reduce switching losses.
How is the soft-start time calculated for a given SS capacitor value?
Soft-start time tSS ≈ CSS × 611mV / 20µA. For example, a 100nF capacitor yields ~3.06ms ramp time. This linear ramp ensures controlled inrush current and avoids false triggering of downstream UVLO circuits.
MPQ8632GLE-12-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 16-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.611V
- Voltage - Output (Max):
- 13V
- Current - Output:
- 12A
- Frequency - Switching:
- 200kHz ~ 1MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (3x4)
MPQ8632GLE-12-P FAQ
1.How can I place an order for MPQ8632GLE-12-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MPQ8632GLE-12-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MPQ8632GLE-12-P reliable?
The price and inventory of MPQ8632GLE-12-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MPQ8632GLE-12-P is usually 5 days.
3.What payment methods are accepted for MPQ8632GLE-12-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MPQ8632GLE-12-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MPQ8632GLE-12-P?
MPQ8632GLE-12-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MPQ8632GLE-12-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MPQ8632GLE-12-P?
For technical support, including MPQ8632GLE-12-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MPQ8632GLE-12-P requirements.
6.How does Aetrix verify that MPQ8632GLE-12-P is sourced from the original manufacturer or authorized distributors?
All MPQ8632GLE-12-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MPQ8632GLE-12-P meets industry standards.
7.What is the process for return or replacement of MPQ8632GLE-12-P?
All MPQ8632GLE-12-P units undergo pre-shipment inspection (PSI). If there is an issue with MPQ8632GLE-12-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MPQ8632GLE-12-P part is unused and in its original packaging.
Return procedure for MPQ8632GLE-12-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MPQ8632GLE-12-P Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

