Monolithic Power Systems Inc. MPQ8632GV-20-P
- Part No.:
- MPQ8632GV-20-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 29-VFQFN Exposed Pad
- Datasheet:
-
MPQ8632GV-20-P.pdf
- Description:
- IC REG BUCK ADJ 20A 29QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,968
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MPQ8632GV-20-P from Monolithic Power Systems is a high-efficiency, 18V-input synchronous step-down DC/DC converter delivering up to 20A output current with 0.611V–13V adjustable output voltage, Constant-On-Time (COT) control for ultrafast transient response, and integrated 9.9mΩ high-side / 2.4mΩ low-side MOSFETs in a 29-pin QFN 5mm×4mm package. It targets high-density power rails in telecom base stations and server VRMs.
For engineers reviewing the MPQ8632GV-20-P datasheet, MPQ8632GV-20-P pinout, MPQ8632GV-20-P application, or MPQ8632GV-20-P equivalent, key selection factors include its non-latch OVP mode, programmable 200kHz–1MHz switching frequency via external resistor, 0.5% reference voltage accuracy over –40°C to +125°C, thermal shutdown at 150°C, and support for pre-bias startup and soft-start timing control.
Technical Context
The MPQ8632GV-20-P implements adaptive COT control without an external oscillator, using input-voltage feedforward through the FREQ pin to maintain stable switching frequency across 4.5V–18V input range. Its internal architecture integrates dual power MOSFETs, bootstrap gate driver, 4.8V VCC LDO, and open-drain power-good signaling with 2.5ms delay.
It operates in PWM mode under continuous conduction (CCM) above critical load (~10A at 12VIN/1VOUT) and transitions to skip-mode DCM at light loads, reducing switching losses while maintaining regulation via current-modulator–controlled valley current limiting down to –4.6A (negative inductor current clamping).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 20A continuous - supports high-power CPU/GPU core rails without external MOSFETs |
| Input Voltage Range | 4.5V to 18V - compatible with 5V, 12V, and intermediate industrial bus rails |
| Output Voltage Range | 0.611V to 13V - covers sub-1V ASIC cores and 12V intermediate distribution |
| Reference Voltage Accuracy | ±0.5% over –40°C to +125°C - ensures tight output regulation across full junction temperature range |
| Switching Frequency | 200kHz to 1MHz - set by external resistor on FREQ pin; enables trade-off between efficiency and filter size |
| High-Side RDS(ON) | 9.9mΩ at TJ = 25°C - minimizes conduction loss at 20A, enabling >94% peak efficiency |
| OVP Mode | Non-latch - recovers automatically after fault clearance; avoids system lockup during transient overvoltage |
| Thermal Shutdown | 150°C with 25°C hysteresis - protects die during sustained overload or poor PCB thermal design |
Pinout & Package
MPQ8632GV-20-P uses a thermally enhanced 29-pin QFN package (5mm × 4mm, 0.5mm pitch), with exposed thermal pad for PCB heat sinking. Pin count and layout differ from the 16-pin 3mm×4mm variant to accommodate higher-current SW and PGND terminals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN (Pin 1) | Enable control input | Active-high digital enable; requires pull-up for automatic startup; 1.3V threshold with 250mV hysteresis |
| FREQ (Pin 2) | Frequency programming node | Connects to VIN via resistor to set ON-time and stabilize switching frequency across input variation |
| FB (Pin 3) | Feedback sensing input | Monitors output via resistor divider; sets VOUT and triggers OVP at 120% VREF |
| SS (Pin 4) | Soft-start timing capacitor | External capacitor sets controlled output ramp rate; prevents inrush current and overshoot |
| AGND (Pin 5) | Analog ground reference | Separate low-noise ground for control circuitry; must be isolated from power ground planes |
| PG (Pin 6) | Power-good open-drain output | Asserts high when VOUT ≥ 91% of target; 2.5ms delay ensures stable regulation before system release |
| VCC (Pin 7) | Internal 4.8V LDO output | Powers gate drivers and logic; can be disabled by applying 5V external bias to reduce quiescent current |
| BST (Pin 8) | Bootstrap supply node | Connects to SW via 0.1μF X7R capacitor to generate floating gate drive voltage for high-side MOSFET |
| IN (Pins 9, 24) | Main power input | Dual high-current inputs minimize IR drop; require wide copper traces and multiple vias for 20A delivery |
| PGND (Pins 10–14, 19–23) | Power ground return | 10 dedicated pins provide low-inductance path for high-frequency switch node return current |
| SW (Pins 15–18, 25–29) | Switch node outputs | 10 parallel SW pins distribute 20A inductor current and reduce trace resistance/inductance |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive COT control | Eliminates loop compensation components and delivers <10μs load-step response without instability risk |
| Proprietary switching loss reduction | Optimized dead-time control and valley current limiting reduce shoot-through and reverse recovery losses |
| Pre-bias start-up capability | Allows safe turn-on into pre-charged output capacitors without reverse current or voltage undershoot |
| Programmable soft-start time | External capacitor sets monotonic VOUT ramp, preventing overshoot and inrush stress on downstream loads |
| Integrated protection suite | Non-latch OCP, OVP, UVP, and thermal shutdown - enables robust field operation without external supervision |
| Scalable footprint family | Shares PCB layout compatibility with MPQ8632GVE-15; simplifies design reuse across 15A/20A power tiers |
Applications
| Telecom Base Stations | Servers & Data Centers |
|---|---|
Use Scenario: Point-of-load conversion for FPGA and ASIC core supplies in macrocell and small-cell radio units. IC Role / Device Role / Timing Role: Primary 20A buck regulator delivering 0.85V/1.2V at <500kHz for RF front-end SoCs with fast dynamic current demands. Use Value: Adaptive COT control maintains ±1% output regulation during 10A/μs load transients typical of LTE/5G burst transmission. | Use Scenario: Core voltage regulation for dual-socket x86 servers requiring high-current, low-noise 1.0V–1.8V rails. IC Role / Device Role / Timing Role: High-density VRM stage replacing multi-phase controllers; operates at 600kHz with 0.5% VREF accuracy. Use Value: Integrated 9.9mΩ/2.4mΩ MOSFETs achieve >93% efficiency at 20A/1.1V, reducing thermal load on motherboard layers. |
| Personal Video Recorders | Distributed Power Systems |
Use Scenario: Main system rail generation in DVR/NVR platforms with mixed 3.3V, 1.8V, and 1.2V domain requirements. IC Role / Device Role / Timing Role: Primary 20A buck supplying 12V-to-5V intermediate bus feeding secondary regulators for video processing SoCs. Use Value: Non-latch OVP prevents system hang during hot-swap events or cable ESD transients on 12V input lines. | Use Scenario: Modular power delivery in industrial PLCs and edge AI gateways requiring scalable, field-replaceable DC/DC stages. IC Role / Device Role / Timing Role: Standalone 20A POL module with PG signal coordination and thermal derating feedback to host controller. Use Value: 29-pin QFN thermal pad and 10x PGND/SW pins enable >3W dissipation on 2oz copper, supporting 24/7 operation at 65°C ambient. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPQ8632GVE-15 | 15A rated; identical 29-pin QFN package but lower RDS(ON) (11.5mΩ HS / 3.0mΩ LS) | Lower max current; suitable for cost-optimized 15A designs with same PCB footprint | Select when full 20A headroom is unnecessary and BOM cost reduction is prioritized |
| TPS546B24A | TI 20A PMBus-enabled buck; 3.5V–18V input; requires external MOSFETs and compensation | Supports digital telemetry and margining; lacks integrated power stage and COT simplicity | Choose only if system-level PMBus monitoring, sequencing, or fault logging is mandatory |
Compared with MPQ8632GVE-15, the MPQ8632GV-20-P delivers 33% higher current in the same footprint with lower RDS(ON), while the TPS546B24A adds digital control complexity and external component overhead at the expense of integration and transient speed.
Availability
MPQ8632GV-20-P is available at Aetrix Electronics and suitable for telecom base stations, server VRMs, and distributed power systems requiring stable component supply, long-term lifecycle assurance, and consistent parametric performance across production batches.
Supply support for MPQ8632GV-20-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with over two decades of expertise in DC/DC conversion, motor drivers, and LED lighting controllers.
The MPQ8632 family was designed specifically for high-current, high-density point-of-load applications in networking, computing, and industrial equipment-emphasizing integration, thermal robustness, and ease of use without sacrificing efficiency or transient response.
FAQ
What is the recommended input capacitor configuration for MPQ8632GV-20-P at 20A output?
Use ≥4× 22μF X5R/X7R ceramic capacitors (0805 or larger) placed within 3mm of the IN and PGND pins, plus one 100μF POSCAP or polymer capacitor near the input connector. Total effective capacitance should exceed 100μF with ESR <5mΩ to suppress high-frequency ripple and sustain 20A pulsed current without VIN droop.
Does MPQ8632GV-20-P support forced continuous conduction mode (FCCM)?
No. MPQ8632GV-20-P operates exclusively in adaptive COT mode with automatic transition between PWM (CCM) and skip-mode (DCM). It lacks a MODE pin or external control to force CCM at light loads; efficiency optimization relies on natural frequency reduction below critical current.
How is thermal performance validated for the 29-pin QFN package?
Thermal resistance is characterized per JESD51-7 on a 4-layer PCB: θJA = 38°C/W and θJC = 6°C/W. Full 20A operation requires the exposed thermal pad to be soldered to ≥4cm² of inner-layer copper pour with ≥6 thermal vias (0.3mm diameter) connecting to solid ground planes.
Can the MPQ8632GV-20-P be synchronized to an external clock?
No. The MPQ8632GV-20-P uses self-timed Constant-On-Time control and has no external clock input or synchronization pin. Frequency is set solely by the resistor on the FREQ pin and input voltage feedforward; it cannot be locked to an external master clock.
What is the minimum output capacitor ESR requirement for stability?
Stability does not depend on output capacitor ESR due to COT architecture. However, for optimal light-load efficiency and jitter suppression, use ceramic capacitors with ESR <5mΩ. If large-ESR POSCAPs are used, select ESR per equation: ESR ≤ 0.7 × TON / (2 × COUT) to avoid VFB slope degradation.
Is the MPQ8632GV-20-P RoHS-compliant and halogen-free?
Yes. MPQ8632GV-20-P is lead-free and fully compliant with EU RoHS Directive 2011/65/EU and JEDEC JS709B. It contains no brominated flame retardants (BFRs), antimony trioxide, or other halogenated compounds per MPS green policy documentation.
How does the non-latch OVP behave during a sustained overvoltage event?
When FB exceeds 120% VREF, the high-side MOSFET shuts off and the low-side remains on to discharge the output. After the fault clears and VFB drops below 117% VREF, the device automatically resumes normal operation without requiring EN toggle or power cycle.
MPQ8632GV-20-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 29-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.611V
- Voltage - Output (Max):
- 13V
- Current - Output:
- 20A
- Frequency - Switching:
- 200kHz ~ 1MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 29-QFN (5x4)
MPQ8632GV-20-P FAQ
1.How can I place an order for MPQ8632GV-20-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MPQ8632GV-20-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MPQ8632GV-20-P reliable?
The price and inventory of MPQ8632GV-20-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MPQ8632GV-20-P is usually 5 days.
3.What payment methods are accepted for MPQ8632GV-20-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MPQ8632GV-20-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MPQ8632GV-20-P?
MPQ8632GV-20-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MPQ8632GV-20-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MPQ8632GV-20-P?
For technical support, including MPQ8632GV-20-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MPQ8632GV-20-P requirements.
6.How does Aetrix verify that MPQ8632GV-20-P is sourced from the original manufacturer or authorized distributors?
All MPQ8632GV-20-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MPQ8632GV-20-P meets industry standards.
7.What is the process for return or replacement of MPQ8632GV-20-P?
All MPQ8632GV-20-P units undergo pre-shipment inspection (PSI). If there is an issue with MPQ8632GV-20-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MPQ8632GV-20-P part is unused and in its original packaging.
Return procedure for MPQ8632GV-20-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MPQ8632GV-20-P Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

_-_-29.jpg)