Monolithic Power Systems Inc. MPQ9840GLE-AEC1-Z

Overview

MPQ9840GLE-AEC1-Z from Monolithic Power Systems is an AEC-Q100 Grade-1 qualified, synchronous step-down DC/DC converter with integrated 125mΩ high-side and 55mΩ low-side MOSFETs. It delivers 3.5A continuous output current across a 3.3V–36V input range, supports 350kHz–2.5MHz programmable switching frequency, and achieves 14μA no-load quiescent current-enabling use in automotive infotainment power rails and ADAS camera modules requiring high efficiency at light load.

For engineers reviewing the MPQ9840GLE-AEC1-Z datasheet, MPQ9840GLE-AEC1-Z pinout, MPQ9840GLE-AEC1-Z application, or MPQ9840GLE-AEC1-Z equivalent, this device is selected for automotive-grade buck conversion where wide VIN, ultra-low IQ, AEC-Q100 compliance, and wettable flank QFN packaging are mandatory design requirements.

Technical Context

The MPQ9840GLE-AEC1-Z employs peak-current-mode control with internal compensation, enabling fast transient response and stable loop behavior without external type-II/type-III networks. Its dual-mode operation-selectable Forced CCM (via SYNC high) or Advanced Asynchronous Mode (AAM via SYNC low)-directly governs light-load efficiency and output ripple trade-offs.

It integrates BST refresh logic to sustain >95% duty cycle operation, supports external soft-start via SS pin (10µA current source), and uses a precision 0.800V ±1.5% feedback reference with open-drain PG output asserting within ±10% of nominal VOUT. The BIAS pin enables efficiency optimization by powering internal circuitry from an external 5–18V rail.

Key Specifications

Pinout & Package

MPQ9840GLE-AEC1-Z is housed in a thermally enhanced, lead-free, wettable flank QFN-16 package (3mm × 4mm, 0.5mm pitch). Exposed thermal pad on underside requires solder connection to PCB ground plane for optimal thermal performance (θJC = 11°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous step-down converter applications.

Compared with MPQ4420AGL-AEC1-Z and LM61480QRNXTQ1, MPQ9840GLE-AEC1-Z uniquely combines AEC-Q100 Grade-1, wettable flank QFN, 3.5A capability, 14μA IQ, and BST refresh-making it the only choice for automotive applications demanding both high-reliability packaging and high-duty-cycle operation.

Availability

MPQ9840GLE-AEC1-Z is available at Aetrix Electronics and suitable for automotive infotainment, ADAS camera modules, telematics control units, and vehicle gateway ECUs requiring stable component supply with full AEC-Q100 traceability and PPAP support.

Supply support for MPQ9840GLE-AEC1-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with over two decades of expertise in DC/DC conversion, motor drivers, and LED lighting controllers.

The MPQ9840 belongs to MPS's automotive-qualified power management portfolio, designed specifically for under-hood and cabin electronics requiring AEC-Q100 Grade-1 reliability, low EMI, and extended temperature operation.

FAQ

What is the purpose of the BIAS pin on MPQ9840GLE-AEC1-Z?

The BIAS pin accepts an external 5–18V supply to power the internal control circuitry and gate drivers, bypassing the internal VIN-to-5V LDO. This reduces power dissipation and increases full-load efficiency by up to 3%, especially beneficial in high-current, high-temperature automotive applications where thermal margin is constrained.

How does the PHASE pin affect synchronization in multi-phase designs?

The PHASE pin selects whether the internal oscillator aligns in-phase (PHASE = high) or 180° out-of-phase (PHASE = low) with the external SYNC clock. This enables interleaved operation with other MPQ9840 devices to reduce input/output ripple and EMI, provided each device uses separate inductors and synchronized clock sources.

Can MPQ9840GLE-AEC1-Z operate with a 24V input and 3.3V output at 2.5MHz?

Yes. With VIN = 24V and VOUT = 3.3V, the required duty cycle is ~13.8%. The 80ns minimum on-time supports this at 2.5MHz (minimum on-time = 400ns period), ensuring stable PWM operation without pulse skipping. Use a 27kΩ resistor on FREQ to set 2.5MHz per the datasheet equation.

What is the function of the BST refresh mechanism during dropout conditions?

When BST-to-SW voltage drops below 2.5V, the MPQ9840GLE-AEC1-Z forces the low-side MOSFET on to recharge the bootstrap capacitor through the inductor and PGND path. This enables sustained operation up to ~98% duty cycle-critical for maintaining 5V output during 12V battery sag in automotive stop-start systems.

Is the PG signal active-high or active-low, and what voltage thresholds trigger it?

The PG signal is open-drain and active-high: it pulls low when VOUT is outside ±10% of the target (e.g., <3.15V or >3.45V for 3.3V output). It releases (floats) when VOUT is within specification, requiring an external pull-up resistor to VOUT or BIAS to generate a logic-high signal for system monitoring.

Does MPQ9840GLE-AEC1-Z support external compensation?

No. The MPQ9840GLE-AEC1-Z uses an optimized internal Type-II compensation network. External compensation is not supported; stability is ensured across all valid operating conditions (VIN, VOUT, IOUT, temperature) using the internal network and recommended external components (BST cap, input/output caps, inductor DCR).

How is thermal performance affected by the wettable flank package?

The wettable flank QFN-16 improves solder joint reliability and enables AOI detection of voids or insufficient solder-reducing field failure risk in automotive applications. Thermally, it maintains identical θJA (48°C/W) and θJC (11°C/W) as the standard QFN, but enhances long-term interconnect integrity under thermal cycling stress.