Monolithic Power Systems Inc. MPQ9846GL-AEC1-P

Overview

MPQ9846GL-AEC1-P from Monolithic Power Systems is a 36V, 0.6A synchronous step-down DC/DC converter with AEC-Q100 Grade 1 qualification, integrated 125mΩ high-side and 115mΩ low-side MOSFETs, 14μA no-load quiescent current, and programmable switching frequency from 350kHz to 2.5MHz. It delivers regulated output in automotive infotainment and ADAS power rails where input voltage varies from cold-crank (3.3V) to load-dump (36V).

For engineers reviewing the MPQ9846GL-AEC1-P datasheet, MPQ9846GL-AEC1-P pinout, MPQ9846GL-AEC1-P application, or MPQ9846GL-AEC1-P equivalent, key selection criteria include its AEC-Q100 Grade 1 rating, ultra-low IQ for always-on battery systems, hiccup-mode OCP, open-drain PG signal with ±10% threshold, and QFN-16 (3mm×4mm) package with exposed thermal pad.

Technical Context

The MPQ9846GL-AEC1-P employs peak current mode control with internal compensation, enabling fast transient response and stable loop behavior across wide VIN (3.3–36V) and temperature (−40°C to +125°C) ranges. Its 80ns minimum on-time supports high-duty-cycle operation down to 3.3V input at 3.3V output.

It integrates AAM (Auto-Audio Mode) for light-load efficiency optimization, low-dropout mode for near-100% duty cycle, and external synchronization via SYNC pin with 250kHz frequency margin requirement. BIAS pin enables efficiency boost by powering gate drivers from an external 5–18V supply.

Key Specifications

Pinout & Package

MPQ9846GL-AEC1-P is housed in a thermally enhanced QFN-16 (3mm × 4mm, 0.5mm pitch) package with exposed thermal pad (EP) on underside for PCB-level heat dissipation. Pin 1 is marked by dot; top marking includes "MP", year/week code, "9846", and lot number.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous buck converter applications.

Compared with MPQ4420AGL-AEC1-P and TPS62933QRGTRQ1, the MPQ9846GL-AEC1-P uniquely combines AEC-Q100 Grade 1, 14μA IQ, AAM, and CISPR 25 Class 5 compliance in a single QFN-16 package-making it optimal for cost- and space-constrained, always-on automotive subsystems demanding full qualification.

Availability

MPQ9846GL-AEC1-P is available at Aetrix Electronics and suitable for automotive infotainment, instrument clusters, and ADAS camera modules requiring stable component supply with full AEC-Q100 traceability and long-term production support.

Supply support for MPQ9846GL-AEC1-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs for automotive, industrial, cloud computing, and consumer markets.

The MPQ9846 belongs to MPS's automotive-grade DC/DC converter product line, designed specifically for AEC-Q100-compliant power delivery in harsh-temperature, high-reliability vehicle subsystems-from body electronics to ADAS sensor nodes.

FAQ

What is the minimum input voltage required for regulation at 3.3V output?

The MPQ9846GL-AEC1-P supports dropout operation down to VIN = VOUT + V_DS(ON), enabling stable 3.3V output even at 3.3V input. With typical R_DS(ON) of 125mΩ and 0.6A load, dropout voltage is ~75mV - so regulation is maintained at VIN ≥ 3.375V. Its low-dropout mode activates automatically below ~90% duty cycle.

How does the BIAS pin improve efficiency?

The BIAS pin powers the internal gate drivers from an external 5–18V supply, bypassing the internal VCC LDO. This reduces power dissipation in the VCC regulator, improving full-load efficiency by 1–2% and lowering die temperature - especially beneficial in thermally constrained automotive modules.

Can the MPQ9846GL-AEC1-P synchronize to a 1MHz clock with 200kHz margin?

No. The SYNC input requires the external clock frequency to exceed the internal oscillator's programmed frequency by at least 250kHz. For a 1MHz target, the internal fSW must be set ≤750kHz (e.g., via ~120kΩ FREQ resistor). Using a 1MHz clock with 1MHz internal setting violates the 250kHz margin and may cause loss of lock or jitter.

Is the PG signal compatible with 1.8V logic interfaces?

Yes. The PG pin is open-drain and requires an external pull-up. When used with a 1.8V pull-up resistor, PG asserts high at ≥0.9×V_PULLUP (i.e., ≥1.62V), well above the 1.8V logic high threshold. Its 0.4V max low-level voltage at 2mA sink also meets 1.8V logic low requirements.

What layout guidance applies to AGND and PGND separation?

AGND and PGND must be isolated on the PCB except at a single star point near the IC's ground pins (pins 4, 9, 13). AGND carries sensitive analog return currents (FB, SS, FREQ); PGND handles high di/dt power return (SW, VIN, BST). Splitting planes and connecting only at one location prevents noise coupling into feedback paths.

Does the device support forced PWM mode to eliminate frequency variation at light loads?

No. The MPQ9846GL-AEC1-P does not offer forced PWM mode. It operates in AAM (pulse-frequency modulation) at light loads to maximize efficiency. For constant-frequency operation across all loads, consider the MPQ4420A or other MPS parts with FPWM option - though those lack the same IQ or AEC-Q100 Grade 1 rating.

How is thermal performance validated for AEC-Q100 Grade 1 compliance?

Thermal validation includes 1000-hour HTOL testing at 125°C ambient with full electrical stress, plus thermal cycling (−40°C ↔ +125°C, 1000 cycles) and high-temperature storage (150°C, 1000h). The 170°C thermal shutdown threshold and 43°C/W θ_JA on the EVB ensure junction temperature remains within Grade 1 limits under worst-case automotive operating profiles.