Microchip Technology MRF24XA-I/MQ
- Part No.:
- MRF24XA-I/MQ
- Manufacturer:
- Microchip Technology
- Category:
- RF Transceiver ICs
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
MRF24XA-I/MQ.pdf
- Description:
- IC RF TXRX+MCU 802.15.4 32VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MRF24XA-I/MQ from Microchip Technology is a 2.4 GHz IEEE 802.15.4-compliant RF transceiver integrating PHY and MAC layers in a single chip, supporting air-data-rates from 125 kbps to 2 Mbps, configurable TX output power from –19 dBm to +1 dBm, hardware AES-128 security engine, and dual 128-byte frame buffers. It serves as the wireless interface in low-power sensor nodes for ZigBee® and MiWi™ networks.
For engineers reviewing the MRF24XA-I/MQ datasheet, MRF24XA-I/MQ pinout, MRF24XA-I/MQ application, or MRF24XA-I/MQ equivalent, this page delivers verified specifications, validated pin functions, confirmed low-power operating modes (Deep Sleep & RX Listen), and real-world use cases in industrial monitoring and home automation systems requiring sub-100 µA deep-sleep current and <4 ms radio wake-up latency.
Technical Context
The MRF24XA-I/MQ implements a zero-IF receiver with RSSI, LQI, ED, and CFO reporting, and a direct-conversion transmitter with 20 dB TX power control range. Its hardware CSMA-CA controller, automatic ACK generation, and per-frame air-data-rate detection enable link-by-link rate adaptation without MCU intervention.
It supports three frame formats: IEEE 802.15.4-2003, IEEE 802.15.4-2006, and a proprietary advanced MAC format with inferred destination addressing. The integrated 1.2 V LDO regulator, 5-bit battery monitor, and four power-saving modes-including Deep Sleep (<40 nA typical) with memory retention-optimize battery life in intermittent transmission applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Air-data-rates | 125/250/500/1000/2000 kbps - enables dynamic throughput scaling and 4×–8× radio ON-time reduction vs. 250 kbps at 2 Mbps |
| TX output power | –19 dBm to +1 dBm - adjustable in 1 dB steps for range/power trade-off tuning in battery-constrained nodes |
| RX current | 13.5 mA (RX Listen Power-Saving mode) - sustains periodic channel sampling with minimal duty-cycle overhead |
| TX current | 27.5 mA (typical at 0 dBm) - defines peak supply demand during packet burst transmission |
| Deep Sleep current | <40 nA (typical) - preserves RAM state over years on coin-cell batteries without external supervision |
| Security | AES-128 hardware engine supporting CTR, CBC-MAC, and CCM* - offloads encryption/decryption from 8-bit MCUs |
| Supply voltage | 1.5 V to 3.6 V - compatible with single-cell Li-ion, LiFePO₄, or alkaline battery stacks without external regulators |
| Operating temperature | –40°C to +85°C - qualified for uncontrolled industrial and outdoor deployment environments |
Pinout & Package
Package: 32-pin 5×5 mm² QFN with exposed thermal pad (MQ suffix per Microchip packaging nomenclature).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 4, 8, 22, 27, 32 | AVDD / DVDD | 1.2 V analog/digital supply rails - must be decoupled with 3.3 pF (AVDD) and 4.7 µF (VREGOUT) capacitors |
| 6, 9, 19, 26, 31 | AVSS / DVSS | Analog/digital ground - requires star topology connection to minimize noise coupling between RF and digital domains |
| 2–3, 5–7 | RFOUTP/N, RFINP/N | Differential RF I/O - connects to balun network; impedance-matched for 50 Ω antenna interface |
| 13 | INT | Active-low interrupt - signals frame reception, transmission completion, or error conditions to host MCU |
| 14–17 | CS, SCK, SDI, SDO | 4-wire SPI slave interface - operates in Mode 0,0 (SCK idle low); supports short/long addressing for register/buffer access |
| 20–21 | PA, LNA | Open-drain control outputs - enable external power amplifier or low-noise amplifier with programmable timing delay |
| 24–25 | OSC1, OSC2 | 16 MHz crystal connections - require 18 pF load capacitance and ±40 ppm tolerance for 2/1 Mbps operation |
| 10–12 | GPIO0–2 | Configurable digital I/O - support Schmitt-trigger input, interrupt generation, or internal block monitoring (e.g., MACOP/RFOP status) |
Key Features
| Feature | Design Value |
|---|---|
| Hardware frame parser | Offloads IEEE 802.15.4 frame validation (FCS, address match, duplicate rejection) from host MCU firmware |
| On-the-fly air-data-rate detection | Enables per-packet rate switching without pre-negotiation - critical for heterogeneous mesh networks with mixed node capabilities |
| Inferred destination addressing | Eliminates explicit destination address field in frames - reduces overhead by up to 8 bytes per packet in star-topology networks |
| Streaming mode operation | Allows continuous data flow using alternating frame buffers - achieves maximum throughput without CPU polling overhead |
| Channel agility with ACKs | Permits rapid channel hopping between transmissions while maintaining reliable acknowledgment delivery across frequency-agile links |
| Battery monitoring | Integrated 5-bit ADC reports supply voltage - enables autonomous low-battery alerts and graceful shutdown in remote sensors |
Applications
| Industrial Monitoring | Home Building Automation |
|---|---|
|
Use Scenario: Wireless temperature/humidity sensors deployed in HVAC ducts and factory floors with 10+ year battery life requirements. IC Role / Device Role / Timing Role: Primary RF transceiver handling time-synchronized data bursts every 5–30 minutes using 250 kbps IEEE 802.15.4 frames. Use Value: Deep Sleep current <40 nA extends CR2032 battery life beyond 12 years; hardware CSMA-CA prevents collisions in dense sensor deployments. |
Use Scenario: Light switch modules and occupancy sensors communicating via MiWi™ P2P stack in residential smart lighting systems. IC Role / Device Role / Timing Role: Low-latency transceiver supporting sub-100 ms command response with automatic retransmit and ACK handling. Use Value: Hardware AES-128 ensures secure pairing; GPIO-controlled PA/LNA enables adaptive range extension for wall-mounted devices. |
| IEEE 1588 Timing Networks | Automatic Meter Reading |
|
Use Scenario: Boundary clocks in industrial Ethernet-to-WPAN gateways requiring precise timestamping of sync messages over 2.4 GHz ISM band. IC Role / Device Role / Timing Role: Timing-aware transceiver delivering <1 µs timestamp resolution via hardware-assisted frame capture and CFO compensation. Use Value: On-chip CFO measurement and correction minimizes phase error accumulation; 2 Mbps mode reduces jitter from radio ON-time uncertainty. |
Use Scenario: Gas/water meter endpoints transmitting consumption data hourly via meshed ZigBee® HA network. IC Role / Device Role / Timing Role: Robust transceiver operating in noisy utility environments with hardware ED/CCA and RSSI-based link quality feedback. Use Value: Multiple CCA modes (energy detect, carrier sense, combined) ensure reliable channel access in electrically hostile meter pits. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 2.4 GHz IEEE 802.15.4 transceiver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT86RF233-MLH | Higher RX sensitivity (–101 dBm @ 250 kbps) but no hardware AES engine; requires external crypto co-processor for CCM* | Better range in weak-signal environments; unsuitable for secure MAC-layer encryption without added BOM cost | Select when raw sensitivity > security integration; avoid if AES-128 acceleration is mandatory for MCU resource constraints |
| CC2531F256RHAT | Integrated 8051 MCU core; lacks dedicated hardware CSMA-CA controller and streaming mode; higher active current (24 mA RX) | Self-contained SoC for simple node logic; less suitable for host-MCU architectures requiring deterministic low-latency SPI control | Select for ultra-low-BOM-count standalone sensors; avoid when host MCU already handles protocol stack and demands minimal transceiver overhead |
Compared with AT86RF233-MLH and CC2531F256RHAT, the MRF24XA-I/MQ uniquely balances hardware-accelerated security, multi-rate agility, and ultra-low deep-sleep current-making it optimal for host-processor-based designs where MCU resources are constrained and battery longevity is non-negotiable.
Availability
MRF24XA-I/MQ is available at Aetrix Electronics and suitable for industrial monitoring, home building automation, IEEE 1588 timing networks, and automatic meter reading applications requiring stable component supply, long-lifecycle assurance, and full regulatory certification support.
Supply support for MRF24XA-I/MQ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a U.S.-based semiconductor manufacturer specializing in microcontrollers, analog devices, and connectivity solutions for embedded systems.
The MRF24XA-I/MQ belongs to Microchip's 2.4 GHz IEEE 802.15.4 transceiver product line, designed specifically for ultra-low-power, standards-compliant wireless sensor networks where host MCU offload, battery lifetime, and interoperability with ZigBee®/MiWi™ stacks are critical.
FAQ
What is the maximum TX output power of the MRF24XA-I/MQ?
The MRF24XA-I/MQ supports configurable TX output power from –19 dBm to +1 dBm in 1 dB steps. This range allows system designers to optimize for either extended range (higher power) or reduced interference and longer battery life (lower power), with 0 dBm delivering 27.5 mA typical TX current. The MRF24XA-I/MQ does not support external PA bias control beyond its native +1 dBm ceiling unless paired with the PA pin-driven external amplifier circuit.
Does the MRF24XA-I/MQ support hardware AES-128 encryption?
Yes, the MRF24XA-I/MQ integrates a dedicated hardware AES-128 security engine supporting CTR, CBC-MAC, and CCM* modes. It performs network-layer encryption/decryption and message integrity checking autonomously, eliminating the need for software-based crypto routines on resource-limited 8-bit MCUs. The MRF24XA-I/MQ key registers (SECKEY1–SECKEY16) and nonce storage (SECNONCE1–SECNONCE12) are accessible via SPI for secure key provisioning.
What power-saving modes does the MRF24XA-I/MQ offer?
The MRF24XA-I/MQ provides five distinct power modes: Deep Sleep (<40 nA, memory retained), Sleep (LDO on, crystal off), RFOFF Crystal ON, RFOFF Synthesizer ON, RX Listen Power-Save (13.5 mA), and full RX/TX operation. These modes are controlled via register writes and enable precise energy budgeting - for example, RX Listen mode allows periodic channel sampling at user-defined intervals while keeping baseband circuits powered down between checks.
How does the MRF24XA-I/MQ handle different air-data-rates?
The MRF24XA-I/MQ supports five discrete air-data-rates (125/250/500/1000/2000 kbps) with identical spectral shape and bandwidth. It features on-the-fly, per-frame rate detection - meaning each received packet's data rate is automatically identified without prior configuration. The MRF24XA-I/MQ also scales frame header duration with selected rate and uses the highest admissible rate to minimize radio ON time, reducing it by up to 8× versus 250 kbps at 2 Mbps.
Is the MRF24XA-I/MQ pin-compatible with other Microchip transceivers like the MRF24J40?
No, the MRF24XA-I/MQ is not pin-compatible with the MRF24J40 series. While both are 2.4 GHz IEEE 802.15.4 transceivers, the MRF24XA-I/MQ uses a 32-pin QFN package with dedicated PA/LNA control pins, separate AVDD/DVDD rails, and enhanced SPI register mapping - whereas the MRF24J40 employs a 40-pin QFN with different pin assignments and no hardware AES engine. Migration requires PCB layout revision and firmware adaptation.
MRF24XA-I/MQ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- TxRx + MCU
- RF Family/Standard:
- 802.15.4, General ISM > 1GHz
- Protocol:
- 6LoWPAN, Zigbee®, MiWi®
- Modulation:
- DSSS, O-QPSK
- Frequency:
- 2.4GHz
- Data Rate (Max):
- 2Mbps
- Power - Output:
- 1dBm
- Sensitivity:
- -103dBm
- Memory Size:
- -
- Serial Interfaces:
- SPI
- GPIO:
- 3
- Voltage - Supply:
- 1.5V ~ 3.6V
- Current - Receiving:
- 13.5mA ~ 16.5mA
- Current - Transmitting:
- 30mA
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 32-VQFN (5x5)
MRF24XA-I/MQ FAQ
1.How can I place an order for MRF24XA-I/MQ through Aetrix?
Please submit a Request for Quotation (RFQ) for MRF24XA-I/MQ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MRF24XA-I/MQ reliable?
The price and inventory of MRF24XA-I/MQ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MRF24XA-I/MQ is usually 5 days.
3.What payment methods are accepted for MRF24XA-I/MQ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MRF24XA-I/MQ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MRF24XA-I/MQ?
MRF24XA-I/MQ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MRF24XA-I/MQ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MRF24XA-I/MQ?
For technical support, including MRF24XA-I/MQ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MRF24XA-I/MQ requirements.
6.How does Aetrix verify that MRF24XA-I/MQ is sourced from the original manufacturer or authorized distributors?
All MRF24XA-I/MQ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MRF24XA-I/MQ meets industry standards.
7.What is the process for return or replacement of MRF24XA-I/MQ?
All MRF24XA-I/MQ units undergo pre-shipment inspection (PSI). If there is an issue with MRF24XA-I/MQ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MRF24XA-I/MQ part is unused and in its original packaging.
Return procedure for MRF24XA-I/MQ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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