NXP Semiconductors MRFG35010

Overview

MRFG35010 from NXP Semiconductors (formerly Freescale) is a gallium arsenide pseudomorphic high-electron-mobility transistor (GaAs PHEMT) RF power FET designed for 3.4–3.6 GHz WLL/MMDS and UMTS driver stages in Class A or Class AB linear base station amplifiers. It delivers 10 W P1dB at 3.55 GHz, 10 dB power gain, 30% drain efficiency, and −42 dBc ACPR under W-CDMA conditions.

For engineers reviewing the MRFG35010 datasheet, MRFG35010 pinout, MRFG35010 application, or MRFG35010 equivalent, this device is selected for high-linearity, high-efficiency RF power amplification in 3.5 GHz licensed-band infrastructure-particularly where unmatched broadband operation, phase linearity, and group delay stability are critical to meet spectral mask and EVM requirements.

Technical Context

The MRFG35010 operates as a common-source GaAs PHEMT with fixed gate biasing capability and is optimized for single-supply 12 V operation. Its unmatched design requires external input/output matching networks referenced to 25 Ω, with source and load impedances specified per frequency (e.g., Z_S = 4.1 − j15.8 Ω, Z_L = 5.7 − j6.8 Ω at 3.55 GHz).

It supports both Class A (I_DQ = 1000 mA) and Class AB (I_DQ = 180 mA) biasing, delivering distinct S-parameter profiles and thermal performance: R_θJC is 5.3 °C/W in Class A and 4.8 °C/W in Class AB, enabling scalable thermal management in compact PA modules.

Key Specifications

Pinout & Package

MRFG35010 is housed in the NI-360HF metal-ceramic flanged package (Case 360D-02, Style 1), featuring a hermetically sealed lid, gold-plated copper flange for low-thermal-resistance mounting, and three solderable terminals compatible with wave or reflow assembly.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar RF power FET applications.

Compared with QPD1009 and MRF3001AN, the MRFG35010 offers optimal balance of gain, linearity, and thermal behavior specifically at 3.5 GHz, making it uniquely suited for unmatched WLL/MMDS driver designs where GaAs PHEMT process advantages outweigh GaN's voltage scalability or LDMOS's low-frequency power density.

Availability

MRFG35010 is available at Aetrix Electronics and suitable for wireless local loop (WLL), UMTS driver amplifiers, MMDS transmitters, and point-to-multipoint broadband access systems requiring stable component supply and long-lifecycle support.

Supply support for MRFG35010 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors acquired Freescale Semiconductor in 2015 and continues to support legacy RF power products with documentation, application engineering, and qualified sources. NXP is a global leader in secure connectivity solutions for automotive, industrial, and communications markets.

The MRFG35010 belongs to NXP's legacy GaAs RF power transistor family, engineered specifically for high-linearity, high-efficiency operation in 3–4 GHz licensed-band infrastructure-emphasizing unmatched flexibility, thermal robustness, and W-CDMA spectral purity.

FAQ

What is the recommended gate bias voltage for MRFG35010 in Class AB operation?

The MRFG35010 exhibits a typical quiescent gate voltage (V_GS(Q)) of −0.8 V at V_DD = 12 V and I_DQ = 180 mA. This value is confirmed in Table 3 of the datasheet and must be set using a stable, low-noise bias network with appropriate decoupling to prevent oscillation. For reliable operation, V_GS should remain within −1.0 V to −0.5 V to maintain specified P1dB and ACPR performance in the MRFG35010.

Does MRFG35010 require external matching networks?

Yes, the MRFG35010 is an unmatched RF power FET and requires external input and output matching networks to achieve optimal gain, efficiency, and linearity. The datasheet provides series-equivalent source and load impedances (e.g., Z_S = 4.1 − j15.8 Ω, Z_L = 5.7 − j6.8 Ω at 3.55 GHz) referenced to 25 Ω, not 50 Ω, meaning matching must be designed accordingly. No internal matching is integrated into the MRFG35010 die or package.

What is the maximum allowable channel temperature for continuous operation of MRFG35010?

The MRFG35010 has a maximum channel temperature (T_ch) rating of 175 °C, but Freescale specifies that reliable long-term operation requires keeping the channel temperature below 150 °C. This is enforced via thermal design using the published R_θJC values (4.8 °C/W for Class AB) and case temperature monitoring. Exceeding 150 °C risks accelerated degradation and parametric shift in the MRFG35010.

Can MRFG35010 be used in Class A mode, and what are the key trade-offs?

Yes, the MRFG35010 supports Class A operation at I_DQ = 1000 mA, as validated by Table 4 S-parameters and thermal data. Trade-offs include higher DC power consumption, lower drain efficiency (~23% vs. 30% in Class AB), and increased thermal load (R_θJC = 5.3 °C/W). However, Class A yields superior linearity and broader small-signal bandwidth-making it suitable for ultra-low-distortion applications where the MRFG35010's phase linearity is prioritized over efficiency.

Is MRFG35010 RoHS compliant, and what does that mean for assembly?

Yes, the MRFG35010 is RoHS compliant per the datasheet footnote and Freescale's 2008 product declaration. This means all homogeneous materials contain ≤0.1 wt% lead, mercury, cadmium, hexavalent chromium, PBB, and PBDE. For assembly, the NI-360HF package supports lead-free reflow profiles (peak ≤260 °C), and the flange plating is compatible with Pb-free solder pastes-no special handling is required beyond standard GaAs ESD precautions for the MRFG35010.