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NXP Semiconductors MRFG35010MT1

Part No.:
MRFG35010MT1
Manufacturer:
NXP Semiconductors
Category:
Single FETs, MOSFETs
Package:
PLD-1.5
Datasheet:
AetrixMRFG35010MT1.pdf
Description:
RF MOSFET PHEMT FET 12V PLD-1.5
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:2,524

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Product details

Overview

MRFG35010MT1 from Freescale Semiconductor is a gallium arsenide pseudomorphic high-electron-mobility transistor (GaAs PHEMT) RF power FET designed for Class AB linear base station driver stages in WLL/MMDS/BWA and UMTS systems operating from 1.8 to 3.6 GHz. It delivers 9 W P1dB at 3.55 GHz with 10 dB power gain, 28% drain efficiency, −43 dBc ACPR under W-CDMA conditions, and operates at 12 Vdc with 180 mA quiescent drain current.

For engineers reviewing the MRFG35010MT1 datasheet, MRFG35010MT1 pinout, MRFG35010MT1 application, or MRFG35010MT1 equivalent, this device is critical for high-linearity, high-efficiency RF driver design in 3.5 GHz infrastructure transmitters where phase linearity, group delay stability, and thermal robustness are essential selection criteria.

Technical Context

The MRFG35010MT1 is an unmatched common-source GaAs PHEMT optimized for broadband RF power amplification in the 1.8–3.6 GHz range. Its architecture supports stable Class AB biasing with VGS(Q) = −0.95 Vdc at IDQ = 180 mA and exhibits excellent small-signal gain (S21 = 0.757 @ 3.55 GHz) and input/output matching flexibility via external microstrip networks.

Thermal performance is defined by RθJC = 6.6 °C/W and a maximum channel temperature of 175 °C, enabling reliable operation up to TC = +85 °C. The device's linearity is validated by W-CDMA ACPR of −43 dBc at 900 mW average output, confirming suitability for multi-carrier 3GPP-compliant base station drivers.

Key Specifications

ParameterValue and Actual Design Meaning
P1dB Output Power9 W at 3.55 GHz - enables single-stage driver capability for 3.5 GHz macro/micro base station PA chains
Power Gain10 dB typical at 3.55 GHz - reduces need for preceding gain stages in cascaded amplifier designs
Drain Efficiency28% at 900 mW avg. output - lowers thermal load and DC power consumption in continuous-wave and modulated operation
ACPR (W-CDMA)−43 dBc at 3.55 GHz, 5 MHz offset - meets stringent spectral mask requirements for 3GPP-compliant base stations
Thermal ResistanceRθJC = 6.6 °C/W - allows direct mounting to heatsinks with predictable junction-to-case temperature rise
Maximum Drain VoltageVDSS = 15 Vdc - provides 3 V headroom above 12 V nominal supply, supporting transient voltage margin
Gate-Source ThresholdVGS(th) = −1.0 Vdc typical - enables precise gate bias control for stable Class AB quiescent point setting

Pinout & Package

MRFG35010MT1 uses the PLD-1.5 plastic package (Case 466-03, Style 1), a 4-pin surface-mount leaded package with exposed drain paddle for thermal management. Dimensions: 6.48 × 5.72 × 1.65 mm (L × W × H), with 0.255″ × 0.225″ footprint and 0.065″ height.

Pin/TerminalCircuit RoleDesign Meaning
1. DrainRF Power Output / High-Voltage DC NodeConnected to RF output matching network and DC supply; requires low-inductance thermal path to heatsink
2. GateRF Input / Bias Control NodeHigh-impedance control terminal; requires stable negative DC bias and RF input matching network
3. SourceRF Ground / Signal ReturnPrimary RF ground reference; must be low-inductance connection to PCB ground plane
4. SourceSecondary RF Ground / Thermal PathDual-source configuration improves grounding integrity and enhances thermal conduction from die to PCB

Key Features

FeatureDesign Value
Unmatched GaAs PHEMT ArchitectureEnables flexible external impedance matching across 1.8–3.6 GHz without internal matching networks
High Phase Linearity & Group Delay StabilityMinimizes signal distortion in wideband modulated signals (e.g., W-CDMA, OFDM), preserving EVM
Lead-Free Termination (T1 Suffix)RoHS-compliant 100% matte tin plating; compatible with standard Pb-free reflow profiles (peak 260 °C, MSL Level 1)
Tape-and-Reel Packaging1000 units per 12 mm × 7 inch reel - supports automated SMT placement in high-volume base station module production
Robust Absolute Maximum Ratings175 °C channel temperature limit and 15 V VDSS provide margin against overvoltage and thermal runaway

Applications

WLL/MMDS Base Station DriverUMTS Macrocell Transmitter

Use Scenario: Fixed wireless access transmitter operating at 2.5–2.7 GHz delivering 10–20 W total output using two-stage PA architecture.

IC Role / Device Role / Timing Role: First-stage RF driver amplifier providing 9 W saturated output and 10 dB gain before final GaN PA stage.

Use Value: Enables compact, thermally efficient driver stage with −43 dBc ACPR, meeting FCC Part 101 spectral emission limits.

Use Scenario: 3G UMTS Node B transmitter supporting six 5-MHz carriers in 2.1 GHz band with 64 DPCH loading.

IC Role / Device Role / Timing Role: Linear driver FET biased in Class AB, delivering 900 mW average W-CDMA output with precise gate voltage control.

Use Value: Achieves required 8.5 dB peak-to-average ratio handling and <0.01% probability EVM compliance without digital predistortion complexity.

BWA Point-to-Multipoint Hub3.5 GHz WiMAX Base Station

Use Scenario: Broadband Wireless Access hub transmitting 16-QAM/64-QAM signals across 3.4–3.6 GHz spectrum with 10 MHz channel bandwidth.

IC Role / Device Role / Timing Role: Unmatched RF driver amplifying IF-to-RF upconverted signal prior to antenna feed network.

Use Value: Delivers high gain and low group delay variation (<2 ns) across 200 MHz bandwidth, preserving symbol timing integrity.

Use Scenario: IEEE 802.16e base station operating at 3.5 GHz with OFDMA modulation and adaptive coding.

IC Role / Device Role / Timing Role: Linear driver stage in transmit chain, requiring stable gain flatness and minimal AM-PM conversion.

Use Value: Provides 10 dB gain flatness ±0.5 dB and phase linearity enabling <3% RMS EVM at 30 MHz bandwidth.

Equivalent & Alternatives

The following parts are listed as comparable options for similar RF power FET applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
MRFG35010NT1Identical electrical and thermal specifications; lead-free terminations only (N suffix replaces T1)No functional or layout impact; same RoHS compliance level and MSL ratingSelect MRFG35010NT1 for new designs requiring full lead-free compliance traceability
QPD1005Higher P1dB (12 W), GaN-on-SiC; 28 V operation; higher gain (14 dB) but lower efficiency at 900 mWRequires redesigned bias network and thermal interface; suited for higher-power final PA stagesChoose QPD1005 only when >10 W output or >20 V supply is required; not drop-in compatible

Compared with MRFG35010NT1, the MRFG35010MT1 offers identical RF performance but with legacy termination finish; versus QPD1005, it provides lower-voltage operation and proven W-CDMA linearity at reduced thermal density, making it optimal for cost-sensitive, thermally constrained driver stages.

Availability

MRFG35010MT1 is available at Aetrix Electronics and suitable for WLL/MMDS base station drivers, UMTS macrocell transmitters, BWA point-to-multipoint hubs, and 3.5 GHz WiMAX infrastructure requiring stable component supply, long-lifecycle support, and RoHS-compliant sourcing.

Supply support for MRFG35010MT1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Freescale Semiconductor (now part of NXP Semiconductors) was a leading designer of RF power semiconductors for wireless infrastructure, automotive, and industrial applications.

The MRFG35010MT1 belongs to Freescale's GaAs PHEMT RF power FET product line, engineered specifically for high-efficiency, high-linearity driver amplifiers in 1.8–3.6 GHz cellular and broadband wireless base stations.

FAQ

What is the recommended gate bias voltage for MRFG35010MT1 in Class AB operation?

The MRFG35010MT1 achieves its specified 180 mA quiescent drain current (IDQ) with a typical gate-source voltage of −0.95 Vdc at VDS = 12 Vdc. The datasheet specifies VGS(Q) ranging from −1.2 Vdc to −0.7 Vdc, so precision biasing circuits should target −0.95 Vdc ±0.1 Vdc. This value is critical for maintaining optimal linearity and efficiency in W-CDMA and OFDM applications, and must be stabilized using low-noise, temperature-compensated bias networks. The MRFG35010MT1's gate threshold voltage (VGS(th)) of −1.0 Vdc further confirms this operating window.

Does MRFG35010MT1 require external matching networks for 3.5 GHz operation?

Yes, the MRFG35010MT1 is an unmatched GaAs PHEMT and requires external input and output matching networks for optimal 3.5 GHz performance. The datasheet provides a complete 3.5 GHz test circuit including microstrip lines (Z1–Z17) and discrete capacitors (C1–C22) on Rogers 4350 substrate. These networks establish the ΓS = 0.898∠−134.03° and ΓL = 0.828∠−140.67° impedances needed to achieve −43 dBc ACPR and 10 dB gain. Without these networks, the MRFG35010MT1 will not meet its published RF specifications.

What is the thermal resistance and maximum channel temperature of MRFG35010MT1?

The MRFG35010MT1 has a thermal resistance from junction to case (RθJC) of 6.6 °C/W, measured under simulated conditions. Its absolute maximum channel temperature (Tch) is 175 °C, though Freescale specifies a derated operating limit of 150 °C for reliable long-term operation. At TC = +85 °C case temperature and 9 W P1dB output, the junction temperature rises approximately 59 °C above case, resulting in ~144 °C junction temperature - within safe margin. Proper heatsinking and PCB copper area are essential to maintain this thermal budget, especially in sealed base station enclosures.

Is MRFG35010MT1 pin-compatible with MRFG35010NT1?

Yes, MRFG35010MT1 and MRFG35010NT1 are mechanically and electrically identical except for termination finish: MRFG35010MT1 uses legacy termination, while MRFG35010NT1 uses lead-free (Pb-free) terminations. Both share the same PLD-1.5 package (Case 466-03, Style 1), identical pinout (Drain, Gate, Source, Source), and identical maximum ratings, electrical characteristics, and thermal parameters. No PCB layout changes are required when migrating from MRFG35010MT1 to MRFG35010NT1, making it a direct replacement for RoHS compliance upgrades.

What W-CDMA performance metrics does MRFG35010MT1 achieve at 3.55 GHz?

At 3.55 GHz under W-CDMA conditions (64 DPCH, 8.5 dB P/A, 3.84 Mcps, 0.01% probability), the MRFG35010MT1 achieves −43 dBc adjacent channel power ratio (ACPR), 900 mW average output power, 10 dB power gain, and 28% drain efficiency at 12 Vdc and IDQ = 180 mA. These values are measured with specified source and load impedances (ΓS = 0.898∠−134.03°, ΓL = 0.828∠−140.67°) and confirm suitability for 3GPP-compliant base station driver applications where spectral purity and linearity are critical.

MRFG35010MT1 Specifications

Product attributes
Attribute value
Manufacturer:
NXP Semiconductors
Series:
-
Package/Case:
PLD-1.5
Packaging:
Tape & Reel (TR)
Product Status:
Obsolete
Technology:
pHEMT FET
Configuration:
-
Frequency:
3.55GHz
Gain:
10dB
Voltage - Test:
12 V
Current Rating (Amps):
-
Noise Figure:
-
Current - Test:
180 mA
Power - Output:
9W
Voltage - Rated:
15 V
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
PLD-1.5

MRFG35010MT1 FAQ

1.How can I place an order for MRFG35010MT1 through Aetrix?

Please submit a Request for Quotation (RFQ) for MRFG35010MT1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for MRFG35010MT1 reliable?

The price and inventory of MRFG35010MT1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MRFG35010MT1 is usually 5 days.

3.What payment methods are accepted for MRFG35010MT1?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MRFG35010MT1 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for MRFG35010MT1?

MRFG35010MT1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your MRFG35010MT1 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for MRFG35010MT1?

For technical support, including MRFG35010MT1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MRFG35010MT1 requirements.

6.How does Aetrix verify that MRFG35010MT1 is sourced from the original manufacturer or authorized distributors?

All MRFG35010MT1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MRFG35010MT1 meets industry standards.

7.What is the process for return or replacement of MRFG35010MT1?

All MRFG35010MT1 units undergo pre-shipment inspection (PSI). If there is an issue with MRFG35010MT1, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The MRFG35010MT1 part is unused and in its original packaging.

Return procedure for MRFG35010MT1:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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