Texas Instruments MSP430FR5728IPWR
- Part No.:
- MSP430FR5728IPWR
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 28-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
MSP430FR5728IPWR.pdf
- Description:
- IC MCU 16BIT 16KB FRAM 28TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,514
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MSP430FR5728IPWR from Texas Instruments is an ultra-low-power 16-bit mixed-signal microcontroller featuring 16KB ferroelectric RAM (FRAM), 1KB SRAM, 8-MHz CPU, 10-bit ADC with 6 external channels, and dual eUSCI modules supporting UART, SPI, and I²C. It operates from 2 V to 3.6 V across –40°C to 85°C and targets battery-powered sensor nodes and data acquisition systems.
For engineers reviewing the MSP430FR5728IPWR datasheet, MSP430FR5728IPWR pinout, MSP430FR5728IPWR application, or MSP430FR5728IPWR equivalent, key selection criteria include FRAM endurance (10¹⁵ write cycles), RTC support in LPM3.5 (1.5 µA), integrated LDO, and TSSOP-28 package compatibility with space-constrained industrial sensing designs.
Technical Context
The MSP430FR5728IPWR implements a 16-bit RISC CPUXV2 core with hardware multiplier and three-channel DMA, enabling efficient signal processing in low-power modes. Its memory subsystem integrates FRAM as unified program/data/storage memory with built-in ECC and MPU for reliability-critical firmware updates.
Analog peripherals include a 10-bit ADC sampling at 200 ksps with internal reference and programmable hysteresis comparator (10 channels), while clocking supports LFXT (32 kHz crystal), HFXT, VLO, and DCO with six factory-trimmed frequencies - all managed via the flexible PMM and SVS/BOR circuitry.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | 16-bit RISC CPUXV2 with 32-bit hardware multiplier - enables deterministic math operations without external co-processing. |
| FRAM Capacity | 16 KB nonvolatile memory with 125 ns/word write speed - allows real-time logging and zero-wait-state code execution. |
| ADC Resolution & Channels | 10-bit SAR ADC with 6 external + 2 internal input channels - supports multi-sensor analog front-end with shared reference. |
| Ultra-Low-Power Modes | LPM3.5 (RTC active): 1.5 µA typical - sustains calendar/timekeeping during extended sleep with crystal oscillator. |
| eUSCI Peripherals | eUSCI_A0/A1 (UART/IrDA/SPI) + eUSCI_B0 (I²C/SPI) - provides dual serial interfaces for sensor hub and host communication. |
| Supply Voltage Range | 2.0 V to 3.6 V - compatible with single-cell Li-ion, Li-SOCl₂, and 2xAA alkaline battery configurations. |
| Operating Temperature | –40°C to +85°C - qualified for industrial-grade deployment in uncontrolled environments. |
Pinout & Package
TSSOP-28 package (9.7 mm × 4.4 mm) with exposed thermal pad recommended for connection to DVSS. Pin functions validated per TI SLASE35C Rev. December 2017, Section 4.4 (Figure 4-4) and Table 4-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P1.0/TA0.1/DMAE0/RTCCLK/A0*/CD0/VeREF- | Multi-function I/O | RTC calibration output, ADC channel A0 input, comparator CD0, and DMA trigger - enables time-synced sensor sampling. |
| P1.1/TA0.2/TA1CLK/CDOUT/A1*/CD1/VeREF+ | Multi-function I/O | ADC reference input (VeREF+), comparator output, and timer clock source - supports ratiometric sensor measurement. |
| P1.4/TB0.1/UCA0STE/A4*/CD4 | Multi-function I/O | Slave transmit enable for eUSCI_A0 SPI, ADC channel A4 input, comparator CD4 - simplifies daisy-chained sensor interface. |
| P1.5/TB0.2/UCA0CLK/A5*/CD5 | Multi-function I/O | SPI clock (master/slave), ADC channel A5 input, comparator CD5 - enables synchronous analog capture with peripheral control. |
| PJ.4/XIN & PJ.5/XOUT | Clock Input/Output | 32-kHz crystal connections for RTC accuracy - requires external LFXT load capacitors (12.5 pF typical). |
| RST/NMI/SBWTDIO | Reset & Debug | Reset assertion, non-maskable interrupt, and Spy-Bi-Wire debug I/O - supports in-system programming without JTAG header. |
| DVCC / DVSS | Core Power | Digital supply (2.0–3.6 V) and ground - decoupling capacitor (100 nF) required within 10 mm of pins. |
| AVCC / AVSS | Analog Power | Separate analog supply domain - must be tied to DVCC unless isolated noise-sensitive design demands local regulation. |
Key Features
| Feature | Design Value |
|---|---|
| Ferroelectric RAM (FRAM) | 16 KB unified memory with 10¹⁵ write endurance and 125 ns write latency - eliminates flash wear leveling and erase delays. |
| Real-Time Clock (RTC_B) | Calendar mode with alarm and 32-kHz crystal support in LPM3.5 (1.5 µA) - enables precise wake-up scheduling for periodic sensing. |
| Power Management | Integrated LDO, SVS with reset, and zero-power brownout detection - ensures robust operation across battery discharge curves. |
| Enhanced Serial Interfaces | eUSCI_A0/A1 (UART/IrDA/SPI) + eUSCI_B0 (I²C/SPI) - permits concurrent communication with UART-based host and I²C sensors. |
| Low-Power Analog Subsystem | 10-bit ADC (200 ksps @ 100 µA) + 10-channel comparator with programmable hysteresis - supports analog threshold detection without CPU wake-up. |
Applications
| Wireless Sensor Node | Industrial Data Logger |
|---|---|
Use Scenario: Battery-powered temperature/humidity node transmitting readings every 5 minutes via UART-to-LoRa module. IC Role / Device Role / Timing Role: Main controller executing sensor read, FRAM-based ring buffer storage, RTC-triggered wake-up, and UART framing. Use Value: 1.5 µA LPM3.5 current extends 2000-mAh coin cell life beyond 5 years; FRAM enables 100% duty-cycle logging without wear-out. |
Use Scenario: Standalone environmental monitor recording voltage, current, and temperature every second into nonvolatile memory. IC Role / Device Role / Timing Role: System-on-chip managing analog acquisition, timestamping, error-checked FRAM writes, and USB/UART upload on demand. Use Value: 125 ns/word FRAM write speed captures 1000 samples/sec without DMA bottlenecks; ECC prevents silent data corruption. |
| Smart Meter Interface | Asset Tracking Beacon |
Use Scenario: Pulse-counting interface between utility meter and NB-IoT modem, requiring tamper detection and secure boot. IC Role / Device Role / Timing Role: Pulse accumulator, secure bootloader executor, and I²C master to metrology IC with RTC time-stamping. Use Value: Memory Protection Unit (MPU) enforces code/data isolation; integrated LDO tolerates wide input ripple from meter power supply. |
Use Scenario: GPS-denied indoor asset tracker using accelerometer wake-up, BLE beacon transmission, and motion-triggered logging. IC Role / Device Role / Timing Role: Low-power state machine coordinating accelerometer interrupt, FRAM event buffer, and eUSCI_B0 I²C to BLE SoC. Use Value: 6.3 µA LPM3 standby current enables >3-year operation on CR2032; comparator hysteresis filters false motion triggers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MSP430FR5724IPWR | 8 KB FRAM, 6 external ADC channels, same TSSOP-28 package and pinout | Lower memory footprint suits simpler sensor fusion or fixed-function monitoring | Select when 16 KB FRAM is unnecessary and BOM cost reduction is prioritized over future firmware scalability. |
| MSP430FR5738IPW | 16 KB FRAM, 12 external ADC channels, TSSOP-28 package but different pin mapping (e.g., P3.x not available) | Higher analog channel count supports multi-parameter environmental sensing without external MUX | Choose when additional ADC inputs are required and PCB layout can accommodate revised signal routing per SLASD32. |
Compared with MSP430FR5724IPWR, the MSP430FR5728IPWR offers double FRAM capacity for larger firmware or longer data buffers; versus MSP430FR5738IPW, it trades ADC channel count for guaranteed pin compatibility across legacy TSSOP-28 designs using P3.x signals.
Availability
MSP430FR5728IPWR is available at Aetrix Electronics and suitable for wireless sensor nodes, industrial data loggers, and smart meter interfaces requiring stable component supply, long-term lifecycle assurance, and TI-authorized traceability.
Supply support for MSP430FR5728IPWR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies with over 90 years of innovation in power efficiency and system integration.
The MSP430FR57xx family was designed for ultra-low-power sensing and system management in building automation, smart grid infrastructure, and industrial IoT edge devices where battery life and nonvolatile memory endurance are critical.
FAQ
What is the maximum operating frequency of the MSP430FR5728IPWR?
The MSP430FR5728IPWR supports a maximum system clock frequency of 8 MHz, achieved via its digitally controlled oscillator (DCO) with six factory-trimmed frequency settings. This allows deterministic real-time execution while maintaining ultra-low active-mode current (81.4 µA/MHz typical). The DCO may be calibrated against an external crystal or internal reference for improved stability across voltage and temperature.
Does the MSP430FR5728IPWR support crystal oscillators for real-time clock operation?
Yes, the MSP430FR5728IPWR supports 32-kHz low-frequency crystals via PJ.4/XIN and PJ.5/XOUT pins for high-accuracy RTC operation in LPM3.5 mode, consuming only 1.5 µA typical. External load capacitors (typically 12.5 pF) are required, and the crystal must meet TI's specified ESR and drive-level limits per SLASE35C Section 5.13.
How many ADC input channels does the MSP430FR5728IPWR provide?
The MSP430FR5728IPWR features a 10-bit ADC (ADC10_B) with 6 external analog input channels (A0–A5) plus 2 internal channels (temperature sensor and VMID), as confirmed in Table 3-1 and Section 5.29 of the SLASE35C datasheet. Channel selection is software-configurable via the ADCCTL1 and ADCMCTL0 registers.
Is the MSP430FR5728IPWR pin-compatible with other devices in the FR572x family?
The MSP430FR5728IPWR in TSSOP-28 (PW package) shares identical pinout with MSP430FR5724IPWR, MSP430FR5726IPWR, and MSP430FR5720IPWR per Figure 4-4 and Table 4-1. However, it is not pin-compatible with RHA (40-pin) or RGE (24-pin) variants due to differing package footprints and signal allocations.
What debug interface does the MSP430FR5728IPWR use?
The MSP430FR5728IPWR uses the two-wire Spy-Bi-Wire (SBW) interface via RST/NMI/SBWTDIO and TEST/SBWTCK pins for programming and debugging - eliminating the need for a full 4-wire JTAG header. This interface is supported by MSP-FET and Code Composer Studio, and enables in-system firmware updates without dedicated debug connectors.
MSP430FR5728IPWR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width)
- Series:
- MSP430™ FRAM
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- MSP430 CPUXV2
- Core Size:
- 16-Bit
- Speed:
- 8MHz
- Connectivity:
- I2C, IrDA, LINbus, SCI, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, PWM, WDT
- Number of I/O:
- 21
- Program Memory Size:
- 16KB (16K x 8)
- Program Memory Type:
- FRAM
- EEPROM Size:
- -
- RAM Size:
- 1K x 8
- Voltage - Supply (Vcc/Vdd):
- 2V ~ 3.6V
- Data Converters:
- A/D 10x10b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
MSP430FR5728IPWR FAQ
1.How can I place an order for MSP430FR5728IPWR through Aetrix?
Please submit a Request for Quotation (RFQ) for MSP430FR5728IPWR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MSP430FR5728IPWR reliable?
The price and inventory of MSP430FR5728IPWR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MSP430FR5728IPWR is usually 5 days.
3.What payment methods are accepted for MSP430FR5728IPWR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MSP430FR5728IPWR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MSP430FR5728IPWR?
MSP430FR5728IPWR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MSP430FR5728IPWR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MSP430FR5728IPWR?
For technical support, including MSP430FR5728IPWR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MSP430FR5728IPWR requirements.
6.How does Aetrix verify that MSP430FR5728IPWR is sourced from the original manufacturer or authorized distributors?
All MSP430FR5728IPWR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MSP430FR5728IPWR meets industry standards.
7.What is the process for return or replacement of MSP430FR5728IPWR?
All MSP430FR5728IPWR units undergo pre-shipment inspection (PSI). If there is an issue with MSP430FR5728IPWR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MSP430FR5728IPWR part is unused and in its original packaging.
Return procedure for MSP430FR5728IPWR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MSP430FR5728IPWR Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

