Texas Instruments MSP430FR5736IRGER
- Part No.:
- MSP430FR5736IRGER
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
MSP430FR5736IRGER.pdf
- Description:
- IC MCU 16BIT 16KB FRAM 24VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MSP430FR5736IRGER from Texas Instruments is an ultra-low-power 16-bit mixed-signal microcontroller featuring 16KB ferroelectric RAM (FRAM), 1KB SRAM, 24-MHz system clock, 10-bit ADC with 12 external channels, and a 10-channel analog comparator. It operates across 2 V–3.6 V supply and –40°C to 85°C, targeting battery-powered sensor nodes and data acquisition systems.
For engineers reviewing the MSP430FR5736IRGER datasheet, MSP430FR5736IRGER pinout, MSP430FR5736IRGER application, or MSP430FR5736IRGER equivalent, key selection criteria include FRAM endurance (10¹⁵ write cycles), LPM3.5 RTC current (1.5 µA), eUSCI_A0/A1 UART/IrDA/SPI support, and RGE package I/O count (17 pins) for space-constrained embedded designs.
Technical Context
The MSP430FR5736IRGER integrates a 16-bit CPUXV2 core with hardware multiplier and three-channel DMA, enabling efficient signal processing in low-power modes. Its FRAM memory replaces both flash and RAM, supporting simultaneous read/write with ECC and MPU protection-critical for firmware updates and data logging without wear leveling.
It features dual enhanced USCI modules: eUSCI_A0 and eUSCI_A1 support UART with auto-baud detection and IrDA encoding/decoding; eUSCI_B0 supports I²C with multi-slave addressing and SPI. The analog subsystem includes a 10-bit ADC sampling at 200 ksps with internal reference and sample-and-hold, plus a 16-channel comparator with programmable hysteresis and voltage reference generation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | 16-bit CPUXV2 with 32-bit hardware multiplier - enables deterministic math operations for sensor fusion and control loops |
| FRAM Capacity | 16 KB nonvolatile memory - eliminates flash erase delays; supports true EEPROM-like byte-write with 10¹⁵ cycle endurance |
| ADC Resolution & Speed | 10-bit, 200 ksps - sufficient for high-fidelity temperature, pressure, and environmental sensing with 100-µA active power |
| Low-Power Mode Current | LPM3.5 (RTC + crystal): 1.5 µA - enables years of operation on coin-cell batteries in time-stamped data loggers |
| Supply Voltage Range | 2.0 V to 3.6 V - compatible with single Li-ion, two alkaline, or regulated 3.3-V rails without external LDO |
| Operating Temperature | –40°C to +85°C - qualified for industrial and outdoor sensor deployments without derating |
| eUSCI Peripherals | 2× eUSCI_A (UART/IrDA/SPI), 1× eUSCI_B (I²C/SPI) - supports concurrent wired communication to sensors, displays, and host controllers |
Pinout & Package
VQFN-24 (RGE) package, 4 mm × 4 mm, 0.5-mm pitch, exposed thermal pad (recommended connection to DVSS).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P1.0/TA0.1/DMAE0/RTCCLK/A0*/CD0/VeREF- | Multi-function I/O | Primary RTC calibration output, ADC channel A0 input, comparator CD0 input, and DMA trigger source - enables time-synchronized sensor sampling |
| P1.1/TA0.2/TA1CLK/CDOUT/A1*/CD1/VeREF+ | Multi-function I/O | ADC reference input (VeREF+), comparator output (CDOUT), and timer clock source - supports precision ratiometric measurements |
| P1.3/TA1.2/UCB0STE/A3*/CD3 | Multi-function I/O | eUSCI_B0 SPI slave transmit enable and ADC channel A3 input - simplifies daisy-chained sensor interfaces |
| P1.4/TB0.1/UCA0STE/A4*/CD4 | Multi-function I/O | eUSCI_A0 SPI slave transmit enable and ADC channel A4 input - allows shared SPI bus with multiple peripherals |
| PJ.0/TDO/TB0OUTH/SMCLK/CD6 | Debug & clock output | JTAG test data output, SMCLK source, and comparator CD6 input - enables in-circuit debugging without dedicated debug pins |
| RST/NMI/SBWTDIO | Reset & debug I/O | Unified reset, non-maskable interrupt, and Spy-Bi-Wire bidirectional debug interface - reduces pin count vs. full JTAG |
Key Features
| Feature | Design Value |
|---|---|
| Ferroelectric RAM (FRAM) | 16 KB unified memory with 125 ns word write, ECC, and MPU - enables atomic firmware updates and secure data storage without flash wear management |
| Ultra-Low-Power RTC | 1.5 µA in LPM3.5 with 32-kHz crystal - delivers calendar/timekeeping with <1 ppm drift for long-term timestamping in energy-harvested devices |
| Hardware Acceleration | 32-bit hardware multiplier and three-channel DMA - offloads CPU during FFTs, filtering, and burst ADC transfers |
| Flexible Clock System | DCO (up to 24 MHz), VLO, LFXT (32 kHz), HFXT - supports dynamic frequency scaling and crystal-less boot with calibrated DCO |
| Analog Integration | 10-bit ADC (200 ksps), 10-channel comparator with hysteresis and internal VREF - enables closed-loop control and threshold-based wake-up without external components |
Applications
| Smart Meter Sensor Node | Industrial Wireless Transmitter |
|---|---|
Use Scenario: Battery-powered gas/water meter collecting pulse counts and temperature every 15 minutes, transmitting via sub-GHz RF link. IC Role / Device Role / Timing Role: Main controller executing low-duty-cycle sampling, FRAM-based event logging, and RTC-triggered transmission windows. Use Value: 1.5 µA LPM3.5 current extends 10-year battery life; FRAM endurance ensures >1 million hourly logs without degradation. | Use Scenario: DIN-rail mounted temperature/humidity transmitter sending Modbus RTU over RS-485 to PLC. IC Role / Device Role / Timing Role: Sensor interface MCU handling ADC reads, linearization, CRC calculation, and UART-to-RS485 protocol translation. Use Value: Hardware CRC and eUSCI_A0 UART with auto-baud detect simplify firmware and improve interoperability with legacy PLCs. |
| Asset Tracking Beacon | Home Automation Hub Controller |
Use Scenario: GPS-denied indoor asset tag using accelerometer wake-up, BLE beacon broadcast, and motion-triggered logging. IC Role / Device Role / Timing Role: Low-power state machine managing motion detection (via P1.x interrupts), FRAM-based context storage, and timed BLE advertising intervals. Use Value: 0.32 µA LPM4.5 shutdown mode minimizes quiescent drain; fast FRAM writes capture motion events before sleep entry. | Use Scenario: Zigbee/Z-Wave gateway aggregating data from 20+ end-node sensors (door/window, occupancy, light level). IC Role / Device Role / Timing Role: Central coordinator running scheduler, managing I²C sensor reads via eUSCI_B0, and buffering data in FRAM before wireless uplink. Use Value: 17 GPIOs and dual eUSCI buses support concurrent sensor polling and radio control; FRAM acts as robust message queue during RF congestion. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MSP430FR5738IRGER | Same RGE package, but includes 6 external ADC channels and 10-channel comparator (vs. 0 ADC / 10-channel comparator on MSP430FR5736IRGER) | Supports analog sensor interfacing where MSP430FR5736IRGER relies on external ADC or digital sensors | Select when on-board ADC is required; MSP430FR5736IRGER is preferred when only digital I/O and comparator functions are needed |
| MSP430FR5969IRHAT | 40-pin RHA package, 64 KB FRAM, integrated LCD driver, higher I/O count (32), and enhanced timer resources | Suited for HMI-rich applications like portable meters or handheld testers requiring display and more peripherals | Choose for expanded memory and I/O; MSP430FR5736IRGER offers smaller footprint and lower cost for minimal-feature sensor nodes |
Compared with MSP430FR5738IRGER and MSP430FR5969IRHAT, the MSP430FR5736IRGER provides the most compact RGE-based solution optimized for comparator-driven wake-up and FRAM-centric data logging-without ADC overhead or package expansion.
Availability
MSP430FR5736IRGER is available at Aetrix Electronics and suitable for smart metering, industrial telemetry, and home automation systems requiring stable component supply, long-life battery operation, and reliable nonvolatile data retention.
Supply support for MSP430FR5736IRGER includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and consumer markets.
The MSP430FR573x product line was designed for ultra-low-power sensing and system management in building automation, smart grid, and industrial monitoring-leveraging FRAM to eliminate flash limitations in frequent-write environments.
FAQ
What is the maximum system clock frequency supported by the MSP430FR5736IRGER?
The MSP430FR5736IRGER supports a maximum system clock frequency of 24 MHz, achieved via its factory-trimmed DCO oscillator. This frequency is fully operational across the entire specified voltage range (2.0 V to 3.6 V) and temperature range (–40°C to +85°C), enabling real-time processing for sensor fusion and protocol stack execution without external crystal dependency.
Does the MSP430FR5736IRGER include an integrated ADC?
No, the MSP430FR5736IRGER does not include an integrated ADC. Per TI's device comparison table (SLAS639L Table 3-1), this variant has "–" listed under the ADC10_B column, confirming zero ADC channels. It retains the 10-channel analog comparator (Comp_D) and supports external ADC interfacing via SPI or I²C through its eUSCI peripherals.
What package type and pin count does the MSP430FR5736IRGER use?
The MSP430FR5736IRGER uses a 24-pin VQFN package (RGE), measuring 4 mm × 4 mm with 0.5-mm pitch and an exposed thermal pad. This package is confirmed in TI's Device Information table and Pin Diagram Figure 4-3, and provides 17 general-purpose I/O pins - optimized for space-constrained, low-pin-count embedded applications.
How does FRAM memory in the MSP430FR5736IRGER differ from traditional flash in firmware update scenarios?
The MSP430FR5736IRGER's 16 KB FRAM enables byte-level, 125 ns writes without erase cycles, unlike flash which requires block erasure before reprogramming. This allows safe, atomic over-the-air (OTA) updates and real-time data logging - even during power loss - with no wear leveling needed and guaranteed 10¹⁵ write cycles, making it ideal for field-upgradable sensor nodes.
Which communication interfaces are available on the MSP430FR5736IRGER for connecting to external sensors?
The MSP430FR5736IRGER provides eUSCI_A0 and eUSCI_A1 supporting UART, IrDA, and SPI; and eUSCI_B0 supporting I²C and SPI. These allow direct connection to digital sensors (e.g., I²C temperature ICs, SPI accelerometers) and host processors. No hardware UART bootloader (BSL) is excluded - the BSL remains accessible via Spy-Bi-Wire on RST/NMI/SBWTDIO.
MSP430FR5736IRGER Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 24-VFQFN Exposed Pad
- Series:
- MSP430™ FRAM
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- MSP430 CPUXV2
- Core Size:
- 16-Bit
- Speed:
- 24MHz
- Connectivity:
- I2C, IrDA, LINbus, SCI, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, PWM, WDT
- Number of I/O:
- 17
- Program Memory Size:
- 16KB (16K x 8)
- Program Memory Type:
- FRAM
- EEPROM Size:
- -
- RAM Size:
- 1K x 8
- Voltage - Supply (Vcc/Vdd):
- 2V ~ 3.6V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
MSP430FR5736IRGER FAQ
1.How can I place an order for MSP430FR5736IRGER through Aetrix?
Please submit a Request for Quotation (RFQ) for MSP430FR5736IRGER on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MSP430FR5736IRGER reliable?
The price and inventory of MSP430FR5736IRGER are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MSP430FR5736IRGER is usually 5 days.
3.What payment methods are accepted for MSP430FR5736IRGER?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MSP430FR5736IRGER transactions.
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4.How is shipping managed for MSP430FR5736IRGER?
MSP430FR5736IRGER orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MSP430FR5736IRGER order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MSP430FR5736IRGER?
For technical support, including MSP430FR5736IRGER datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MSP430FR5736IRGER requirements.
6.How does Aetrix verify that MSP430FR5736IRGER is sourced from the original manufacturer or authorized distributors?
All MSP430FR5736IRGER products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MSP430FR5736IRGER meets industry standards.
7.What is the process for return or replacement of MSP430FR5736IRGER?
All MSP430FR5736IRGER units undergo pre-shipment inspection (PSI). If there is an issue with MSP430FR5736IRGER, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MSP430FR5736IRGER part is unused and in its original packaging.
Return procedure for MSP430FR5736IRGER:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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