Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Embedded > Microcontrollers

Texas Instruments MSP430FR5989IRGCT

Name: MSP430FR5989IRGCT
Brand: Texas Instruments
SKU: MSP430FR5989IRGCT
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: MSP430FR5989IRGCT

Manufacturer:: Texas Instruments

Category:: Microcontrollers

Package:: 64-VFQFN Exposed Pad

Datasheet:: MSP430FR5989IRGCT.pdf

Description:: IC MCU 16BIT 128KB FRAM 64VQFN

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:455

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

MSP430FR5989IRGCT from Texas Instruments is a 16-bit ultra-low-power FRAM microcontroller with 128KB nonvolatile memory, 2KB RAM, and integrated extended scan interface (ESI) for precision analog sensing. It operates from 1.8 V to 3.6 V, delivers 100 µA/MHz active current, and supports real-time clock (RTC) operation at 0.35 µA in LPM3.5 - optimized for battery-powered utility metering and portable data loggers.

For engineers reviewing the MSP430FR5989IRGCT datasheet, MSP430FR5989IRGCT pinout, MSP430FR5989IRGCT application, or MSP430FR5989IRGCT equivalent, key selection criteria include ESI peripheral support for capacitive fluid/gas measurement, FRAM endurance (10¹⁵ write cycles), AES256 encryption coprocessor, and VQFN-64 package compatibility with space-constrained industrial sensor nodes.

Technical Context

The MSP430FR5989IRGCT implements the MSP430 CPUXV2 core with 16 general-purpose registers and executes instructions at up to 16 MHz using a digitally controlled oscillator (DCO) with 10 factory-trimmed frequencies. Its low-power architecture includes seven defined modes (LPM0–LPM4.5), with LPM3.5 enabling RTC operation while retaining FRAM contents and waking on external interrupt or timer event.

Peripherals are tightly coupled to power domains: the ESI operates independently in LPM3 for background analog acquisition, while eUSCI_A0/A1 support UART/IrDA/SPI and eUSCI_B0/B1 support I²C/SPI - all configurable without CPU intervention via DMA channels. The 12-bit ADC12_B provides up to 16 external inputs but is omitted in the MSP430FR5989 variant per Device Comparison Table 3-1.

Key Specifications

Parameter	Value and Actual Design Meaning
Core Architecture	16-bit RISC CPUXV2 with 16 registers, up to 16-MHz operation
Nonvolatile Memory	128KB FRAM - enables instant writes, 10¹⁵ endurance, no erase before write
RAM	2KB SRAM - retained in LPM3, used for stack and volatile variables
Supply Voltage Range	1.8 V to 3.6 V - supports single-cell Li-ion or dual-cell alkaline battery systems
Active Current	~100 µA/MHz - enables energy-efficient firmware execution in portable applications
LPM3.5 Current	0.35 µA typical - powers RTC + 32-kHz crystal while preserving FRAM and register state
ESI Peripheral	Integrated extended scan interface - performs autonomous capacitance-to-digital conversion for water/heat metering

Pinout & Package

VQFN-64 (RGC) package, 9 mm × 9 mm body, 0.5 mm pitch, thermally enhanced exposed pad (TI recommends connecting pad to VSS).

Pin/Terminal	Circuit Role	Design Meaning
P1.0–P1.7	General-purpose I/O with capacitive touch	Supports CSD without external components; P1.0/P1.1 also serve as VREF+/VREF− for analog functions
P2.0–P2.7	Multi-function I/O with UART BSL	P2.0/P2.1 are BSLTX/BSLRX for hardware bootloader; P2.4–P2.7 drive LCD COM lines
P3.0–P3.7	eUSCI_B1 and eUSCI_A1 interface	Support I²C slave addressing and SPI master/slave; critical for sensor hub communication
P6.0–P6.7	LCD segment driver outputs	Drive up to 48 segments (MSP430FR5989 lacks LCD_C module per Table 3-1 - pins repurposed as GPIO)
P9.0–P9.7	ESI channel inputs	ESICH0–ESICH3 and ESICI0–ESICI3 enable 8-channel capacitive sensing for flow/level detection
PJ.4/PJ.5	Low-frequency crystal interface	Connect 32.768-kHz LFXT for RTC accuracy; internal load caps eliminate external capacitors

Key Features

Feature	Design Value
Ferroelectric RAM (FRAM)	128KB unified memory space eliminates flash erase latency and wear leveling overhead
Extended Scan Interface (ESI)	Hardware-accelerated capacitance measurement with programmable resolution - replaces external ASICs in metering designs
AES256 Security Coprocessor	Dedicated hardware engine performs encryption/decryption without CPU load - essential for secure firmware updates
EnergyTrace++™ Support	Real-time current profiling down to µA level - accelerates ultra-low-power firmware optimization
Three-Channel DMA	Enables peripheral-to-peripheral data movement (e.g., ESI → FRAM) without CPU wake-up - extends battery life

Applications

Water Metering	Heat Cost Allocation
Use Scenario: Ultrasonic or oscillating disk-based residential water meters requiring decade-long battery life and tamper-resistant data logging. IC Role / Device Role / Timing Role: Primary system controller executing ESI-based flow calculation, RTC-timestamped FRAM storage, and encrypted wireless transmission. Use Value: FRAM enables 100% duty-cycle logging at 1-second intervals without write degradation; ESI achieves ±0.5% flow accuracy without external signal conditioning.	Use Scenario: Apartment-level thermal energy allocation units measuring radiator surface temperature and flow time-integrated heat transfer. IC Role / Device Role / Timing Role: Sensor fusion node aggregating ESI-driven capacitance (for valve position), ADC-derived temperature, and RTC calendar for billing period alignment. Use Value: Single-chip integration reduces BOM cost by eliminating separate metrology ASIC and secure element; LPM3.5 sustains 10-year coin-cell operation.
Portable Medical Logging	Industrial Data Acquisition
Use Scenario: Handheld blood glucose or inhaler usage trackers needing FDA-grade data integrity and low-power Bluetooth LE connectivity. IC Role / Device Role / Timing Role: Secure data concentrator managing sensor input, AES256-encrypted FRAM storage, and BLE subsystem timing via eUSCI_A0 UART. Use Value: 10¹⁵ FRAM write cycles guarantee >20 years of daily 100-entry logs; true random number seed enables FIPS-compliant cryptographic key generation.	Use Scenario: Remote environmental monitoring nodes deployed in unattended locations, logging temperature, humidity, and vibration over multi-year intervals. IC Role / Device Role / Timing Role: Autonomous logger using ESI for humidity sensing, RTC alarm wake-up every 15 minutes, and DMA-driven FRAM buffering before RF transmission. Use Value: Active mode current <100 µA/MHz allows solar harvesting from small panels; shutdown mode (LPM4.5) draws only 0.02 µA during extended idle periods.

Water Metering

Heat Cost Allocation

Use Scenario: Ultrasonic or oscillating disk-based residential water meters requiring decade-long battery life and tamper-resistant data logging.

IC Role / Device Role / Timing Role: Primary system controller executing ESI-based flow calculation, RTC-timestamped FRAM storage, and encrypted wireless transmission.

Use Value: FRAM enables 100% duty-cycle logging at 1-second intervals without write degradation; ESI achieves ±0.5% flow accuracy without external signal conditioning.

Use Scenario: Apartment-level thermal energy allocation units measuring radiator surface temperature and flow time-integrated heat transfer.

IC Role / Device Role / Timing Role: Sensor fusion node aggregating ESI-driven capacitance (for valve position), ADC-derived temperature, and RTC calendar for billing period alignment.

Use Value: Single-chip integration reduces BOM cost by eliminating separate metrology ASIC and secure element; LPM3.5 sustains 10-year coin-cell operation.

Portable Medical Logging

Industrial Data Acquisition

Use Scenario: Handheld blood glucose or inhaler usage trackers needing FDA-grade data integrity and low-power Bluetooth LE connectivity.

IC Role / Device Role / Timing Role: Secure data concentrator managing sensor input, AES256-encrypted FRAM storage, and BLE subsystem timing via eUSCI_A0 UART.

Use Value: 10¹⁵ FRAM write cycles guarantee >20 years of daily 100-entry logs; true random number seed enables FIPS-compliant cryptographic key generation.

Use Scenario: Remote environmental monitoring nodes deployed in unattended locations, logging temperature, humidity, and vibration over multi-year intervals.

IC Role / Device Role / Timing Role: Autonomous logger using ESI for humidity sensing, RTC alarm wake-up every 15 minutes, and DMA-driven FRAM buffering before RF transmission.

Use Value: Active mode current <100 µA/MHz allows solar harvesting from small panels; shutdown mode (LPM4.5) draws only 0.02 µA during extended idle periods.

Equivalent & Alternatives

The following parts are listed as comparable options for similar ultra-low-power FRAM microcontroller applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MSP430FR5989IPM	LQFP-64 package (10 mm × 10 mm); same FRAM/RAM/peripherals; no ESI pins routed to package	Lacks ESI functionality - unsuitable for capacitive sensing; requires external ADC for analog front-end	Select when board layout favors LQFP and ESI is not required; pin-compatible for GPIO and serial interfaces
MSP430FR5969IRGCT	64KB FRAM (50% less), identical VQFN-64 package and ESI peripheral; same 2KB RAM and power specs	Lower memory capacity limits firmware complexity and data retention depth - suitable for simpler metering logic	Choose for cost-sensitive designs where 64KB FRAM suffices for application code + 30-day log buffer

Compared with MSP430FR5989IPM and MSP430FR5969IRGCT, the MSP430FR5989IRGCT uniquely delivers full ESI capability in the space-constrained VQFN-64 package with maximum FRAM density - making it the only option for high-accuracy, self-contained capacitive metering in compact enclosures.

Availability

MSP430FR5989IRGCT is available at Aetrix Electronics and suitable for water metering, heat cost allocation, and portable medical logging requiring stable component supply across multi-year production cycles.

Supply support for MSP430FR5989IRGCT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions with emphasis on energy efficiency and system integration.

The MSP430 ULP FRAM portfolio targets battery-operated sensing and measurement applications - designed to replace legacy flash-based MCUs with zero-write-latency, radiation-hardened nonvolatile memory and sub-µA real-time operation.

FAQ

What is the maximum operating frequency of the MSP430FR5989IRGCT?

The MSP430FR5989IRGCT supports a maximum CPU clock frequency of 16 MHz using its digitally controlled oscillator (DCO). This frequency is factory-trimmed across 10 selectable settings and can be further calibrated using the built-in reference oscillator. The device maintains full functionality - including FRAM access, ESI operation, and peripheral clocks - at this rate while consuming approximately 1.6 mA in active mode.

Does the MSP430FR5989IRGCT include an integrated LCD driver?

No, the MSP430FR5989IRGCT does not include the LCD_C peripheral. Per Table 3-1 in the SLAS789D datasheet, LCD_C is present in MSP430FR698x devices but explicitly omitted in the MSP430FR598x family. Pins P6.0–P6.7 and P2.4–P2.7 on the RGC package are available as general-purpose I/O and do not drive LCD segments in the MSP430FR5989IRGCT.

How many capture/compare registers does the Timer_A module provide in the MSP430FR5989IRGCT?

The MSP430FR5989IRGCT includes four Timer_A modules (TA0–TA3), with TA0 and TA1 each providing three capture/compare registers, and TA2 and TA3 offering two and five registers respectively - totaling 13 capture/compare registers. These support PWM generation, input capture for time-of-flight measurements, and interval timing critical for ESI synchronization and RTC calendar functions.

What bootloading interfaces are supported by the MSP430FR5989IRGCT?

The MSP430FR5989IRGCT supports both UART-based and I²C-based hardware bootloaders (BSL). UART BSL uses P2.0 (BSLTX) and P2.1 (BSLRX); I²C BSL uses P1.6 (BSLSDA) and P1.7 (BSLSCL). The BSL is factory-programmed and enables field firmware updates without JTAG - essential for sealed metering devices requiring post-deployment security patches.

Is the Extended Scan Interface (ESI) available on all package variants of the MSP430FR5989IRGCT?

Yes, the ESI peripheral is fully implemented in the MSP430FR5989IRGCT and all MSP430FR598x variants. Its dedicated pins (P9.0–P9.7 for ESICH0–ESICH3 and ESICI0–ESICI3) are routed to the VQFN-64 (RGC) package. Unlike the MSP430FR698x series, the MSP430FR598x ESI does not require external biasing components and operates autonomously in LPM3 for continuous background sensing.

MSP430FR5989IRGCT Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Package/Case:: 64-VFQFN Exposed Pad

Series:: MSP430™ FRAM

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

Core Processor:: MSP430 CPUXV2

Core Size:: 16-Bit

Speed:: 16MHz

Connectivity:: I2C, IrDA, SPI, UART/USART

Peripherals:: Brown-out Detect/Reset, DMA, POR, PWM, WDT

Number of I/O:: 48

Program Memory Size:: 128KB (128K x 8)

Program Memory Type:: FRAM

EEPROM Size:: -

RAM Size:: 2K x 8

Voltage - Supply (Vcc/Vdd):: 1.8V ~ 3.6V

Data Converters:: A/D 12x12b

Oscillator Type:: Internal

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:

MSP430FR5989IRGCT FAQ

1.How can I place an order for MSP430FR5989IRGCT through Aetrix?

Please submit a Request for Quotation (RFQ) for MSP430FR5989IRGCT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for MSP430FR5989IRGCT reliable?

The price and inventory of MSP430FR5989IRGCT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MSP430FR5989IRGCT is usually 5 days.

3.What payment methods are accepted for MSP430FR5989IRGCT?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MSP430FR5989IRGCT transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for MSP430FR5989IRGCT?

MSP430FR5989IRGCT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your MSP430FR5989IRGCT order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for MSP430FR5989IRGCT?

For technical support, including MSP430FR5989IRGCT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MSP430FR5989IRGCT requirements.

6.How does Aetrix verify that MSP430FR5989IRGCT is sourced from the original manufacturer or authorized distributors?

All MSP430FR5989IRGCT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MSP430FR5989IRGCT meets industry standards.

7.What is the process for return or replacement of MSP430FR5989IRGCT?

All MSP430FR5989IRGCT units undergo pre-shipment inspection (PSI). If there is an issue with MSP430FR5989IRGCT, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The MSP430FR5989IRGCT part is unused and in its original packaging.

Return procedure for MSP430FR5989IRGCT:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…