Texas Instruments MSP430FR68791IPNR
- Part No.:
- MSP430FR68791IPNR
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 80-LQFP
- Datasheet:
-
MSP430FR68791IPNR.pdf
- Description:
- IC MCU 16BIT 128KB FRAM 80LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MSP430FR68791IPNR from Texas Instruments is a 16-bit ultra-low-power FRAM microcontroller with 128KB nonvolatile memory, 2KB RAM, integrated 12-bit ADC (16 external channels), LCD driver (up to 320 segments), and dual eUSCI modules supporting UART/IrDA/SPI/I²C. It operates from 1.8 V to 3.6 V and targets battery-powered metering applications requiring long-term data retention and low active/standby current.
For engineers reviewing the MSP430FR68791IPNR datasheet, MSP430FR68791IPNR pinout, MSP430FR68791IPNR application, or MSP430FR68791IPNR equivalent, key selection criteria include FRAM endurance (10¹⁵ write cycles), RTC+calendar in LPM3.5 (0.35 µA), capacitive touch I/O on all ports P1–P10/PJ, and I²C bootloader support - critical for secure firmware updates in utility meters.
Technical Context
The MSP430FR68791IPNR implements the CPUXV2 16-bit RISC core with hardware multiplier and three-channel DMA, enabling deterministic real-time processing in energy-constrained systems. Its clock system integrates DCO (10 factory-trimmed frequencies), LFXT (32-kHz crystal), HFXT, and VLO - supporting dynamic mode switching between Active (100 µA/MHz) and LPM4.5 (20 nA).
Peripherals are tightly coupled to low-power operation: the 12-bit ADC includes internal reference and sample-and-hold; the LCD_C module drives static/2–8-mux displays up to 320 segments with contrast control; and both eUSCI_A and eUSCI_B modules support simultaneous UART and I²C with hardware bootloader - confirmed for I²C BSL per device nomenclature and pin assignment (P1.6/BSLSDA, P1.7/BSLSCL).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | CPUXV2 16-bit RISC with 16 registers and 32-bit hardware multiplier - enables fast math-intensive metering algorithms without external co-processor. |
| FRAM Capacity | 128 KB unified nonvolatile memory - eliminates flash erase latency; supports true EEPROM-like byte-write with 10¹⁵ cycle endurance for daily log writes over 20+ years. |
| ADC Resolution | 12-bit SAR ADC with 16 external input channels and internal reference - delivers ±1 LSB INL for precision analog sensing in water/heat meters. |
| Low-Power Modes | LPM3.5 (RTC active): 0.35 µA typical; LPM4.5 (shutdown): 0.02 µA typical - extends CR2032 battery life beyond 10 years in intermittent-read applications. |
| LCD Driver | Integrated LCD_C supporting up to 320 segments with static, 2–8 multiplex - drives full-feature utility meter displays without external bias IC or external glass drivers. |
| Bootloader Interface | Hardware I²C Bootloader (BSL) on P1.6 (SDA) and P1.7 (SCL) - enables field firmware updates via two-wire interface without JTAG or UART pins. |
| Capacitive Touch | All P1–P10 and PJ pins support CTSIO without external components - reduces BOM cost and PCB area for sealed front-panel user interfaces. |
Pinout & Package
LQFP-80 package (12 mm × 12 mm), thermally enhanced with exposed pad; 80-pin layout optimized for metering PCBs with dedicated AVSS/AVCC domains, segmented LCD commons (COM0–COM7), and dual eUSCI routing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P1.6 / UCB0SIMO / UCB0SDA / TA0.1 / BSLSDA | I²C Data / BSL Interface | Primary SDA line for I²C BSL; also serves as SPI data output and Timer_A capture input - requires pull-up for BSL operation. |
| P1.7 / UCB0SOMI / UCB0SCL / TA0.2 / BSLSCL | I²C Clock / BSL Interface | Primary SCL line for I²C BSL; also functions as SPI data input and Timer_A capture input - must be pulled up for reliable bootloader entry. |
| P6.3 / COM0 | LCD Backplane Driver | First common output for multiplexed LCD glass; paired with segment drivers (e.g., P6.4–P6.6, P2.4–P2.7) to enable 8-backplane displays. |
| P8.0 / RTCCLK | RTC Calibration Output | Provides calibrated 1-Hz or higher-frequency signal from RTC module for external timekeeping verification or sensor synchronization. |
| RST/NMI/SBWTDIO | Reset / Debug I/O | Active-low reset input with NMI capability; doubles as Spy-Bi-Wire data I/O for programming and debug - requires external 47-kΩ pull-up. |
Key Features
| Feature | Design Value |
|---|---|
| Ferroelectric RAM (FRAM) | 128 KB unified memory enables instant write-on-data-change logging, eliminating wear leveling and erase delays - critical for burst-capture metering events. |
| Integrated LCD Controller | Drives up to 320 segments with programmable contrast and internal charge pump - removes need for external LCD bias generator and saves 3–5 passive components. |
| Capacitive Touch I/O | All 64 GPIO pins (P1–P10, PJ) support CTSIO natively - allows full front-panel touch interface on sealed meters without overlay sensors or dedicated touch controller IC. |
| I²C Hardware Bootloader | Dedicated BSL on P1.6/P1.7 supports secure firmware updates over I²C bus - avoids UART pin conflicts and enables updates during normal operation without reset interruption. |
| Ultra-Low-Power RTC | 0.35 µA typical current in LPM3.5 with calendar and alarm - maintains accurate timekeeping for billing intervals and wake-up scheduling while preserving battery life. |
Applications
| Water Metering | Heat Cost Allocation |
|---|---|
|
Use Scenario: Ultrasonic or mechanical flow measurement with hourly pulse logging, temperature compensation, and tamper detection. IC Role / Device Role / Timing Role: Main system controller executing metrology algorithms, managing FRAM-based event logs, and driving LCD display with real-time consumption data. Use Value: 128 KB FRAM stores >10 years of hourly readings; RTC alarm wakes MCU every hour for measurement - reducing average current to <1 µA. |
Use Scenario: Apartment-level thermal energy allocation using inlet/outlet temperature differential and flow rate integration. IC Role / Device Role / Timing Role: Dual-sensor acquisition hub with 12-bit ADC oversampling, CRC32 integrity checking on stored data, and LCD display of monthly cost breakdown. Use Value: Integrated LCD_C drives 240-segment display showing tariff periods and consumption history; FRAM ensures no data loss during power failure. |
| Portable Medical Meters | Data Logging |
|
Use Scenario: Battery-powered blood glucose or inhaler usage tracker with Bluetooth LE interface and compliance reporting. IC Role / Device Role / Timing Role: Sensor signal conditioner, secure data logger, and USB/I²C bridge to host - leveraging hardware AES (not present) is excluded; instead uses FRAM + CRC32 for data integrity. Use Value: Capacitive touch I/O enables sealed, IP67-compliant buttonless UI; LPM4.5 (20 nA) extends single-CR2032 life to >5 years with daily use. |
Use Scenario: Environmental monitoring node recording temperature, humidity, and voltage at 15-minute intervals for industrial asset tracking. IC Role / Device Role / Timing Role: Autonomous data aggregator with RTC-triggered sampling, FRAM circular buffer management, and eUSCI_A1 UART for periodic upload. Use Value: 10¹⁵ FRAM write cycles allow indefinite logging without degradation; 32-bit CRC engine validates each log entry before storage. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power FRAM microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MSP430FR6879IPN | UART-based BSL (P2.0/BSLTX, P2.1/BSLRX); identical FRAM, ADC, LCD, and power specs. | Requires UART interface for firmware updates; unsuitable where UART pins are allocated to sensor comms or legacy protocols. | Select when UART is available for field updates and I²C bus is occupied by sensors or peripherals. |
| MSP430FR6877IPN | 64 KB FRAM (vs. 128 KB); otherwise identical peripheral set, package, and low-power performance. | Insufficient nonvolatile storage for multi-year hourly logging in utility meters; suitable for simpler data history or shorter retention. | Select for cost-sensitive designs where 64 KB FRAM meets regulatory data retention requirements (e.g., 3–5 years). |
Compared with MSP430FR6879IPN and MSP430FR6877IPN, the MSP430FR68791IPNR provides I²C BSL flexibility in pin-constrained layouts and double the FRAM capacity for extended data retention - making it optimal for EN1434-compliant heat meters and MID-certified water meters requiring 10+ year logs.
Availability
MSP430FR68791IPNR is available at Aetrix Electronics and suitable for water metering, heat cost allocation, portable medical instrumentation, environmental data logging, and industrial battery-powered telemetry requiring stable component supply and long-term manufacturability.
Supply support for MSP430FR68791IPNR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies with decades of expertise in ultra-low-power design.
The MSP430FR68791IPNR belongs to TI's ULP FRAM microcontroller portfolio, engineered specifically for utility metering, portable instrumentation, and industrial IoT endpoints where nonvolatile memory endurance, sub-µA sleep current, and integrated analog peripherals reduce system complexity.
FAQ
What distinguishes MSP430FR68791IPNR from MSP430FR6879IPN?
The MSP430FR68791IPNR features an I²C hardware bootloader (BSL) on pins P1.6/BSLSDA and P1.7/BSLSCL, whereas the MSP430FR6879IPN uses UART BSL on P2.0/BSLTX and P2.1/BSLRX. Both share identical FRAM (128 KB), ADC, LCD, and low-power specifications. The I²C BSL enables firmware updates over existing two-wire sensor buses without dedicating UART resources - a key advantage in metering designs with constrained pin count.
Does MSP430FR68791IPNR support capacitive touch sensing on all I/O ports?
Yes, the MSP430FR68791IPNR supports capacitive touch sensing on all P1–P10 and PJ port pins without external components. This capability is implemented via the integrated CapTIvate™-compatible CTSIO peripheral, allowing designers to implement sealed, waterproof user interfaces for utility meters and medical devices using only firmware configuration - no additional RC networks or dedicated touch controller ICs required.
What is the maximum LCD segment count supported by MSP430FR68791IPNR?
The MSP430FR68791IPNR supports up to 320 LCD segments using its integrated LCD_C module with static, 2-, 3-, 4-, 6-, or 8-mux configurations. This is achieved through dedicated COM0–COM7 outputs and segment drivers across multiple ports (e.g., P6.x, P2.x, P3.x). The 80-pin LQFP package (IPNR) routes all necessary commons and segments, enabling full-feature displays for MID-certified meters without external LCD drivers.
How does the FRAM memory in MSP430FR68791IPNR improve data logging reliability?
The MSP430FR68791IPNR's 128 KB FRAM offers 10¹⁵ write cycles and zero write latency - unlike flash, it requires no erase-before-write and sustains byte-level writes at full speed (125 ns/word). In data logging applications, this eliminates risk of data corruption during power loss, enables true circular buffer operation, and supports high-frequency event capture (e.g., tamper detection pulses) without wear-out concerns over 20+ years of operation.
Is RTC functionality available in lowest-power modes on MSP430FR68791IPNR?
Yes, the MSP430FR68791IPNR supports full RTC operation including calendar, alarms, and calibration in LPM3.5 mode at 0.35 µA typical current. This mode retains RAM and RTC state while disabling CPU, MCLK, and SMCLK - enabling precise timekeeping and scheduled wake-ups for hourly metering tasks while maximizing battery life in CR2032- or AA-powered deployments.
MSP430FR68791IPNR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 80-LQFP
- Series:
- MSP430™ FRAM
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- MSP430 CPUXV2
- Core Size:
- 16-Bit
- Speed:
- 16MHz
- Connectivity:
- I2C, IrDA, SCI, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, DMA, LCD, POR, PWM, WDT
- Number of I/O:
- 63
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FRAM
- EEPROM Size:
- -
- RAM Size:
- 2K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.8V ~ 3.6V
- Data Converters:
- A/D 12x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
MSP430FR68791IPNR FAQ
1.How can I place an order for MSP430FR68791IPNR through Aetrix?
Please submit a Request for Quotation (RFQ) for MSP430FR68791IPNR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MSP430FR68791IPNR reliable?
The price and inventory of MSP430FR68791IPNR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MSP430FR68791IPNR is usually 5 days.
3.What payment methods are accepted for MSP430FR68791IPNR?
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4.How is shipping managed for MSP430FR68791IPNR?
MSP430FR68791IPNR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MSP430FR68791IPNR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MSP430FR68791IPNR?
For technical support, including MSP430FR68791IPNR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MSP430FR68791IPNR requirements.
6.How does Aetrix verify that MSP430FR68791IPNR is sourced from the original manufacturer or authorized distributors?
All MSP430FR68791IPNR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MSP430FR68791IPNR meets industry standards.
7.What is the process for return or replacement of MSP430FR68791IPNR?
All MSP430FR68791IPNR units undergo pre-shipment inspection (PSI). If there is an issue with MSP430FR68791IPNR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MSP430FR68791IPNR part is unused and in its original packaging.
Return procedure for MSP430FR68791IPNR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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