Texas Instruments MSPM0L1305SDGS20R
- Part No.:
- MSPM0L1305SDGS20R
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 20-TFSOP (0.118", 3.00mm Width)
- Datasheet:
-
MSPM0L1305SDGS20R.pdf
- Description:
- IC MCU 32BIT 32KB FLASH 20TFSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MSPM0L1305SDGS20R from Texas Instruments is a 32-bit Arm Cortex-M0+ microcontroller operating at up to 32 MHz, featuring 32 KB flash, 4 KB SRAM, and a 12-bit 1.68-Msps ADC with 8 external analog input channels. It integrates two zero-drift chopper op-amps, one high-speed comparator with 8-bit DAC, and supports ultra-low-power STANDBY mode (1.0 µA) with 32-kHz timer retention - ideal for battery-powered sensor nodes and portable power management systems.
For engineers reviewing the MSPM0L1305SDGS20R datasheet, MSPM0L1305SDGS20R pinout, MSPM0L1305SDGS20R application, or MSPM0L1305SDGS20R equivalent, key selection criteria include its 20-pin VSSOP package, –40°C to 125°C extended temperature rating, 1.62–3.6 V supply range, integrated analog signal chain, and support for LIN/IrDA/SMBus protocols in low-power modes.
Technical Context
The MSPM0L1305SDGS20R implements an Arm Cortex-M0+ core with on-chip SYSOSC (±1.2% accuracy) eliminating external crystals, and features a dedicated peripheral bus architecture with AHB/ULPCLK domains enabling concurrent high-speed and ultra-low-power operation. Its analog subsystem includes programmable interconnect between ADC, OPAs, COMP, and VREF, allowing flexible signal routing without external components.
Digital intelligence is delivered via a 3-channel DMA, event fabric for cross-peripheral triggering, four 16-bit timers supporting 8 PWM outputs, and dual UARTs with LIN/Smart Card protocol support - all retaining functionality in STANDBY mode with sub-µs wakeup latency (3.2 µs).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M0+, 32 MHz max - enables real-time control with deterministic interrupt latency and Thumb-2 instruction efficiency. |
| Flash / SRAM | 32 KB / 4 KB - sufficient for firmware + calibration data storage in compact embedded applications like smart sensors. |
| ADC | 12-bit, 1.68-Msps, 8 external channels - supports high-resolution, high-throughput sampling of battery voltage, temperature, and current sense signals. |
| OPA | Two zero-drift chopper op-amps (0.5 µV/°C drift, 6-pA bias) - enables precision front-end amplification for low-level sensor signals without manual calibration. |
| Low-Power Modes | STANDBY: 1.0 µA with 32-kHz timer active, 32-MHz wakeup in 3.2 µs - extends battery life in intermittently active monitoring systems. |
| Operating Range | –40°C to 125°C, 1.62–3.6 V - qualified for industrial and automotive under-hood environments without external thermal or voltage regulation. |
| Communication | 2× UART (LIN/IrDA), 2× I²C (SMBus/PMBus), 1× SPI (16 Mbit/s) - supports multi-protocol connectivity to power ICs, displays, and host controllers. |
Pinout & Package
Package: 20-pin VSSOP (DGS), 5.1 mm × 4.9 mm body, with exposed pad not present - compatible with standard surface-mount reflow processes and space-constrained PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD / VSS | Power supply / Ground | Primary 1.62–3.6 V digital/analog supply pair; decoupling required per TI layout guidelines. |
| VCORE | Regulated core voltage output | Internally generated ~1.2 V for CPU and digital logic - must be externally bypassed with 1 µF ceramic capacitor. |
| PA0–PA27 (subset) | Configurable GPIO / Analog / Peripheral | 17 GPIOs total on DGS20 package; includes 8 ADC inputs (A0–A7), SWD debug (SWCLK/SWDIO), UART/I²C/SPI functions, and OPA/COMP/GPAMP terminals. |
| NRST | Reset input | Active-low reset shared with PA1 on 20-pin variant - requires external pull-up and optional RC debounce for robust system initialization. |
| A0–A7 | ADC analog inputs | Eight dedicated external analog input pins (not multiplexed with digital-only functions) - enable simultaneous sensing of multiple analog sources. |
| OPA0_IN0+/OPA0_IN0− OPA1_IN0+/OPA1_IN0− | Chopper op-amp differential inputs | Hardware-configured high-impedance inputs for precision amplification; internal chopping eliminates DC offset drift over temperature/time. |
| COMP0_IN0+/COMP0_IN0− COMP0_IN1+/COMP0_IN1− | Comparator dual-input pairs | Four analog comparator inputs supporting windowed or threshold-based event detection with 32-ns propagation delay. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated analog signal chain | ADC, two zero-drift OPAs, COMP with 8-bit DAC, GPAMP, and VREF all on-die - reduces BOM count and PCB area for sensor interface designs. |
| Programmable analog interconnect | Hardware routing matrix between ADC, OPAs, COMP, and DAC - enables configurable signal paths (e.g., OPA → COMP → ADC) without software overhead or external wiring. |
| Ultra-low-power STANDBY mode | 1.0 µA with 32-kHz timer running, full SRAM/register retention, and 32-MHz clock ready in 3.2 µs - supports rapid wake-on-event in energy-harvesting or coin-cell applications. |
| Protocol-ready communication | UARTs support LIN physical layer and IrDA encoding; I²C supports SMBus alert and PMBus commands - simplifies integration into automotive and power-management ecosystems. |
| On-chip clocking | Internal 4–32 MHz SYSOSC (±1.2%) and 32-kHz LFOSC (±3%) - eliminates need for external crystals/capacitors, reducing cost and board space. |
Applications
| Battery Charging Control | Industrial Sensor Node |
|---|---|
Use Scenario: Real-time monitoring and closed-loop control of Li-ion battery charge profiles in portable medical devices. IC Role / Device Role / Timing Role: MCU executing charging algorithm, reading cell voltage/current via ADC, driving gate drivers through PWM, and communicating status via UART. Use Value: Integrated 12-bit ADC and zero-drift OPAs enable accurate voltage/current measurement; STANDBY mode extends runtime between charges. | Use Scenario: Wireless temperature/humidity node in HVAC ducts with 10-year battery life target. IC Role / Device Role / Timing Role: Signal acquisition (temp sensor + analog humidity sensor), low-power processing, and periodic BLE gateway communication via UART-to-radio bridge. Use Value: On-chip temperature sensor + programmable OPA gain eliminates external signal conditioning; 1.0 µA STANDBY enables decade-scale operation on AA batteries. |
| Smart Power Supply Monitoring | Building Fire Safety Interface |
Use Scenario: Secondary-side telemetry in isolated AC/DC adapters for real-time output voltage, current, and temperature reporting. IC Role / Device Role / Timing Role: Isolated analog sensing (via opto-coupled ADC inputs), fault detection using comparator windowing, and UART communication to primary controller. Use Value: Dual comparator inputs and hardware windowing allow autonomous overvoltage/overcurrent shutdown without CPU intervention - improves safety response time. | Use Scenario: Smoke detector with CO sensing, self-test, and wired alarm signaling over 2-wire loop. IC Role / Device Role / Timing Role: Analog acquisition of electrochemical CO sensor output, periodic self-calibration using internal reference, and Manchester-encoded loop communication via UART. Use Value: Internal 1.4-V/2.5-V VREF and chopper OPAs ensure stable, drift-free sensor signal conditioning across –40°C to 125°C operating range. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MSPM0L1304SDGS20R | 16 KB flash, 2 KB SRAM, same package/peripherals | Reduced firmware capacity limits complex control algorithms or protocol stacks | Select when application firmware fits within 16 KB and cost optimization is critical. |
| MSPM0L1306SDGS20R | 64 KB flash, 4 KB SRAM, identical analog/digital IP and package | Enables larger RTOS deployments, OTA updates, and future feature expansion | Select when firmware growth headroom, field-upgradability, or dual-application partitioning is required. |
Compared with MSPM0L1304SDGS20R, the MSPM0L1305SDGS20R provides double the flash for enhanced firmware resilience and logging; versus MSPM0L1306SDGS20R, it offers optimal balance of code space and cost for mid-complexity power management tasks without over-provisioning.
Availability
MSPM0L1305SDGS20R is available at Aetrix Electronics and suitable for battery charging control, industrial sensor nodes, and smart power supply monitoring requiring stable component supply across automotive, medical, and building automation programs.
Supply support for MSPM0L1305SDGS20R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions for industrial, automotive, and personal electronics markets.
The MSPM0L130x product line delivers ultra-low-power, mixed-signal MCUs optimized for battery-operated sensing, power conversion, and real-time control - combining high-precision analog integration with Arm Cortex-M0+ efficiency.
FAQ
What is the maximum operating frequency of the MSPM0L1305SDGS20R?
The MSPM0L1305SDGS20R operates at a maximum CPU frequency of 32 MHz using its internal SYSOSC, which maintains ±1.2% accuracy across temperature and voltage - eliminating the need for an external crystal while ensuring deterministic real-time performance in timing-critical applications.
How many analog input channels does the MSPM0L1305SDGS20R support?
The MSPM0L1305SDGS20R supports eight external analog input channels (A0–A7) for its 12-bit, 1.68-Msps ADC. These are physically dedicated pins on the 20-pin VSSOP package and can be routed to internal peripherals including OPAs and the comparator via the programmable analog interconnect matrix.
Does the MSPM0L1305SDGS20R include hardware debug support?
Yes, the MSPM0L1305SDGS20R includes 2-pin serial wire debug (SWD) support via dedicated SWCLK and SWDIO pins (PA20 and PA19). This enables full JTAG-style debugging, flash programming, and real-time trace capabilities using standard TI or third-party debug probes without requiring additional pins or interfaces.
What low-power modes are available on the MSPM0L1305SDGS20R?
The MSPM0L1305SDGS20R offers four low-power modes: RUN (71 µA/MHz), STOP (151 µA at 4 MHz), STANDBY (1.0 µA with 32-kHz timer active and full memory retention), and SHUTDOWN (61 nA with IO wakeup). All modes retain register state and support fast wakeup - STANDBY achieves 3.2 µs to full 32-MHz operation.
Is the MSPM0L1305SDGS20R qualified for extended temperature operation?
Yes, the MSPM0L1305SDGS20R is qualified for operation from –40°C to 125°C (S-grade) and supports supply voltages from 1.62 V to 3.6 V. This extended qualification makes it suitable for under-hood automotive, industrial motor drives, and outdoor infrastructure applications without derating or external thermal management.
MSPM0L1305SDGS20R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 20-TFSOP (0.118", 3.00mm Width)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M0+
- Core Size:
- 32-Bit
- Speed:
- 32MHz
- Connectivity:
- DALI, I2C, IrDA, LINbus, SmartCard, SMBus, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, DMA, POR, PWM, WDT
- Number of I/O:
- 17
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 4K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.62V ~ 3.6V
- Data Converters:
- A/D 8x12b SAR
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
MSPM0L1305SDGS20R FAQ
1.How can I place an order for MSPM0L1305SDGS20R through Aetrix?
Please submit a Request for Quotation (RFQ) for MSPM0L1305SDGS20R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MSPM0L1305SDGS20R reliable?
The price and inventory of MSPM0L1305SDGS20R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MSPM0L1305SDGS20R is usually 5 days.
3.What payment methods are accepted for MSPM0L1305SDGS20R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MSPM0L1305SDGS20R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MSPM0L1305SDGS20R?
MSPM0L1305SDGS20R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MSPM0L1305SDGS20R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MSPM0L1305SDGS20R?
For technical support, including MSPM0L1305SDGS20R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MSPM0L1305SDGS20R requirements.
6.How does Aetrix verify that MSPM0L1305SDGS20R is sourced from the original manufacturer or authorized distributors?
All MSPM0L1305SDGS20R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MSPM0L1305SDGS20R meets industry standards.
7.What is the process for return or replacement of MSPM0L1305SDGS20R?
All MSPM0L1305SDGS20R units undergo pre-shipment inspection (PSI). If there is an issue with MSPM0L1305SDGS20R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MSPM0L1305SDGS20R part is unused and in its original packaging.
Return procedure for MSPM0L1305SDGS20R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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