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Microchip Technology MT9160BS1
- Part No.:
- MT9160BS1
- Manufacturer:
- Microchip Technology
- Category:
- Telecom
- Package:
- 20-SOIC (0.209", 5.30mm Width)
- Datasheet:
-
MT9160BS1.pdf
- Description:
- IC TELECOM INTERFACE 20SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:1,725
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Product details
Overview
MT9160BS1 from Zarlink Semiconductor is a 5 V multi-featured codec (MFC) IC designed for telephony analog/digital audio conversion, featuring integrated filter/codec, programmable µ-Law/A-Law companding per ITU-T G.711, differential handset transducer interface, and ST-BUS/SSI digital interface. It delivers 0–3.3 kHz speech bandwidth, supports 64 kb/s PCM B-channels, and drives 300 Ω speaker loads with fully differential HSPKR+/HSPKR− outputs.
For engineers reviewing the MT9160BS1 datasheet, MT9160BS1 pinout, MT9160BS1 application, or MT9160BS1 equivalent, key selection considerations include its 20-pin SOIC package, single 5 V supply operation, controllerless default mode, programmable transmit/receive/side-tone gains, and compliance with ITU-T G.714 transmit filter specifications.
Technical Context
The MT9160BS1 implements a fully differential analog front-end with on-chip anti-aliasing and reconstruction filters, internal VRef and VBias generation, and dual-domain gain control: transmit filter gain adjustable from 0 dB to +7 dB in 1 dB steps, receive filter gain from 0 dB to −7 dB, and side-tone gain from −9.96 dB to +9.96 dB in 3.32 dB steps.
Its flexible digital interface supports both ST-BUS (2048 kb/s, 32-channel TDM, D/C/B-channel access) and SSI modes (strobe-synchronized 8-bit timeslots), with serial microport compatibility for Intel MCS-51, Motorola SPI, and National Microwire controllers - automatically detecting mode via SCLK state at CS assertion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | Single 5 V ±5 % - enables direct integration into legacy telephony power domains without auxiliary regulators. |
| Audio Bandwidth | 0–3.3 kHz - meets narrowband telephony requirements per ITU-T G.712 and supports standard PCM voice coding. |
| Companding Standard | ITU-T G.711 µ-Law or A-Law - selectable via register or A/m/IRQ pin, ensuring interoperability with PSTN and ISDN infrastructure. |
| Transmit Filter Compliance | ITU-T G.714 - guarantees spectral mask conformance for echo canceller and hybrid interface stability. |
| Speaker Driver Load | 300 Ω balanced - directly interfaces standard telephone handsets without external amplification or matching networks. |
| Digital Interface Modes | ST-BUS (2048 kb/s) and SSI - provides hardware-level compatibility with Zarlink transceivers (e.g., ZL502xx) and generic PCM controllers. |
| Side-tone Control | Programmable −9.96 dB to +9.96 dB in 3.32 dB steps - enables precise acoustic feedback tuning per handset acoustics and user preference. |
Pinout & Package
MT9160BS1 is housed in a 20-pin SOIC package (Pb-free matte tin finish), operating over −40°C to +85°C. Pin functions are validated per Zarlink MT9160B/61B Data Sheet Rev. May 2005.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VBias | Bias voltage output | Provides VDD/2 reference (2.5 V nominal) for external amplifier biasing; requires 0.1 µF capacitor to VSSA and 1 µF to VRef. |
| 2 VRef | Codec reference voltage | Internal reference [(VDD/2) − 1.9 V] ≈ 0.6 V; must be decoupled with 0.1 µF to VSSA and 1 µF to VBias for stable ADC/DAC operation. |
| 3 PWRST | Power-up reset input | Active-low CMOS/Schmitt trigger resets internal registers to defaults: µ-Law, side-tone off, 0 dB gains, SSI mode at 2048 kb/s. |
| 4 IC | Internal connection | Must be externally tied to VSSD (digital ground) for normal operation; floating or incorrect connection disables functionality. |
| 5 A/m/IRQ | Companding select / interrupt output | Configures µ-Law (VSSD) or A-Law (VDD) when DEn = 0; becomes open-drain IRQ for D-channel sync when DEn = 1. |
| 6 VSSD | Digital ground | Reference for all digital I/O (CS, SCLK, DATA1/2, Din/Dout, STB/F0i, CLOCKin); must be isolated from VSSA. |
| 7 CS | Chip select input | Active-low enable for serial microport access; must remain asserted across full two-byte command/data transfer. |
| 8 SCLK | Serial clock input | Defines microport timing mode: high at CS fall → Intel mode (DATA1 bidirectional); low → Motorola/National (DATA1 out, DATA2 in). |
| 9 DATA1 | Serial data I/O | In Intel mode: bidirectional command/data line; in Motorola mode: transmit-only; latched on rising SCLK edge. |
| 10 DATA2 | Serial data input | Motorola/National mode only - receives data on rising SCLK edge; disconnected in Intel mode. |
| 11 Dout | Digital output | Three-state 8-bit PCM data output synchronized to STB/F0i; tri-stated when STB inactive or PDDR = 1 (quiet code). |
| 12 Din | Digital input | 8-bit PCM data input sampled on falling edge of CLOCKin during STB/F0i-defined timeslot. |
| 13 STB/F0i | Strobe/frame pulse input | Active-high 8 kHz strobe (SSI) or frame pulse (ST-BUS); defines B-channel timeslot; CMOS-compatible with 5 V logic. |
| 14 CLOCKin | System clock input | Accepts 512 kHz+ bit clock directly; for 128/256 kHz bit clocks, requires external 4096 kHz master clock for internal timing synthesis. |
| 15 VDD | Positive supply | 5 V ±5 % main power rail; powers all analog and digital blocks; requires local 0.1 µF ceramic decoupling to VSSD. |
| 16 HSPKR− | Inverting speaker output | Differential output paired with HSPKR+; drives 300 Ω balanced load; internally compensated for stability. |
| 17 HSPKR+ | Non-inverting speaker output | Differential output paired with HSPKR−; complements HSPKR− to deliver full 300 Ω drive capability with common-mode rejection. |
| 18 VSSA | Analog ground | Reference for all analog circuits (transducer interface, filters, VRef/VBias); must be star-connected and separate from VSSD. |
| 19 M− | Inverting microphone input | Differential input paired with M+; accepts balanced electret or dynamic microphone signals; gain configurable to 6.0 dB or 15.3 dB. |
| 20 M+ | Non-inverting microphone input | Differential input paired with M−; completes full-differential mic preamp path; rejects common-mode noise in handset cabling. |
Key Features
| Feature | Design Value |
|---|---|
| Fully differential analog architecture | Enables >70 dB SNR and >60 dB CMRR from single 5 V supply, eliminating need for dual-rail op-amps or level-shifting circuitry. |
| On-chip VRef and VBias generation | Removes external reference ICs and bias networks; reduces BOM count by ≥3 components while improving thermal drift tracking. |
| Controllerless default operation | Permits immediate system bring-up without firmware initialization - all critical functions (µ-Law, SSI, 0 dB gains) active at power-on. |
| ST-BUS D-channel interrupt (IRQ) | Eliminates polling overhead by signaling valid 16 kb/s D-channel register access every 4 frames, enabling deterministic ISDN protocol handling. |
| Programmable side-tone path | Allows real-time acoustic feedback tuning via register writes - essential for meeting EN 60950-1 loudness and comfort requirements. |
Applications
| Digital Telephone Sets | Cellular Radio Sets |
|---|---|
|
Use Scenario: Integrated voice interface in corded/cordless desk phones supporting PSTN and VoIP gateways. IC Role / Device Role / Timing Role: Primary codec handling analog handset interface, PCM framing, and µ-Law encoding/decoding for upstream transmission. Use Value: Eliminates discrete op-amps, filters, and voltage references; reduces PCB area by >40% versus discrete solutions while maintaining G.711 compliance. |
Use Scenario: Audio subsystem in analog cellular base stations or repeaters interfacing legacy mobile handsets. IC Role / Device Role / Timing Role: Analog front-end for microphone/speaker paths with programmable gain staging to accommodate varying RF front-end noise floors. Use Value: Differential M+/M− and HSPKR+/HSPKR− inputs/outputs suppress RF ingress; on-chip 300 Ω driver avoids external Class AB amplifier. |
| Local Area Communications Stations | ISDN Terminal Adapters |
|
Use Scenario: Voice channel termination in enterprise PBX extensions or conference station hybrids. IC Role / Device Role / Timing Role: B-channel codec with ST-BUS interface synchronizing to Layer 1 transceiver (e.g., ZL50210) for 2B+D framing. Use Value: Direct ST-BUS compatibility enables plug-and-play integration with Zarlink transceivers; C-channel register access simplifies status monitoring. |
Use Scenario: D-channel signaling engine in ISDN TA devices requiring transparent 16 kb/s bitstream handling. IC Role / Device Role / Timing Role: D-channel register (address 06h) with IRQ-driven access ensures deterministic 16 kb/s HDLC frame alignment and error recovery. Use Value: Hardware-managed D-channel buffering and interrupt eliminates microcontroller timing jitter; supports both 8 kb/s and 16 kb/s D-channel rates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar telephony codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MT9161BS1 | Includes delayed framing pulse (STBd/F0od) output for cascaded ST-BUS device synchronization; otherwise identical pinout, registers, and electrical specs. | Required for multi-device ST-BUS daisy chains where frame alignment across chips is critical (e.g., multi-line gateway boards). | Select MT9161BS1 only if delayed frame pulse is needed; MT9160BS1 is preferred for standalone or non-cascaded implementations. |
| SLIC3710 | Integrated SLIC + codec in single package; supports -48 V line interface, loop supervision, and battery feed - MT9160BS1 lacks line-side functionality. | Applicable to central office line cards or VoIP FXS ports; not suitable for handset-only endpoints due to higher voltage and complexity. | Choose SLIC3710 for full subscriber line interface; MT9160BS1 remains optimal for cost-sensitive, low-voltage handset and terminal adapter designs. |
Compared with MT9161BS1, MT9160BS1 omits the delayed frame pulse but offers identical core codec performance and lower cost for non-cascaded systems; versus SLIC3710, it provides superior analog fidelity and lower power for endpoint audio paths but requires external line interface circuitry.
Availability
MT9160BS1 is available at Aetrix Electronics and suitable for digital telephone sets, ISDN terminal adapters, local area communications stations, and cellular radio base stations requiring stable component supply across extended product lifecycles.
Supply support for MT9160BS1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Zarlink Semiconductor was a fabless semiconductor company specializing in communications ICs, acquired by Microsemi in 2011. Its products targeted carrier-grade timing, voice, and broadband access infrastructure.
The MT9160BS1 belongs to Zarlink's Multi-Featured Codec (MFC) family, engineered specifically for cost-optimized, single-supply telephony endpoints requiring G.711 compliance, differential analog I/O, and flexible digital interface options.
FAQ
What is the operating temperature range for the MT9160BS1?
The MT9160BS1 is rated for industrial operation from −40°C to +85°C, validated per its 20-pin SOIC packaging and ISO2-CMOS process. This range supports deployment in uncontrolled environments such as desktop telephones, base station enclosures, and industrial communication terminals where ambient temperatures may exceed commercial limits. The MT9160BS1 maintains full G.711 encoding accuracy and side-tone gain stability across this span.
Does the MT9160BS1 support both µ-Law and A-Law companding?
Yes, the MT9160BS1 supports both ITU-T G.711 µ-Law and A-Law companding through dual configuration methods: hardware selection via the A/m/IRQ pin (tied to VSSD for µ-Law, VDD for A-Law) or software control using the A/µ register bit in Control Register 2 (address 04h). The companding law is logically OR'ed between pin and register, enabling seamless fallback or override in controllerless or microcontroller-managed systems.
How does the MT9160BS1 handle side-tone generation and control?
The MT9160BS1 generates side-tone by tapping the transmit filter input and summing it into the receive path after the Rx filter gain stage - ensuring side-tone level remains independent of receive gain adjustments. Side-tone gain is programmable from −9.96 dB to +9.96 dB in 3.32 dB steps via STG0–STG2 bits in Gain Control Register 2 (address 01h), and the path is disabled by default after PWRST. This architecture enables precise acoustic feedback tuning per handset mechanical design.
Can the MT9160BS1 operate without a microcontroller?
Yes, the MT9160BS1 supports controllerless operation using factory-default register settings activated at power-on reset (PWRST): µ-Law companding, SSI mode at 2048 kb/s, 0 dB transmit/receive/side-tone gains, and side-tone disabled. All digital interface pins (CS, SCLK, DATA1/2) may be left unconnected, and the device functions immediately with only STB/F0i, CLOCKin, Din/Dout, and transducer connections - ideal for minimal-footprint designs.
What is the purpose of the VBias and VRef pins on the MT9160BS1?
VBias provides a buffered VDD/2 (2.5 V nominal) output for biasing external analog circuitry, while VRef supplies a stabilized [(VDD/2) − 1.9 V] ≈ 0.6 V reference exclusively for internal ADC/DAC operation. Both require mandatory decoupling: 0.1 µF from each to VSSA (shared analog ground point), plus 1 µF between VBias and VRef to suppress switching noise. Incorrect decoupling causes audible distortion and G.711 compliance failure.
MT9160BS1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 20-SOIC (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Function:
- CODEC
- Interface:
- -
- Number of Circuits:
- 1
- Voltage - Supply:
- 4.75V ~ 5.25V
- Current - Supply:
- 4µA
- Power (Watts):
- -
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-SOIC
MT9160BS1 FAQ
1.How can I place an order for MT9160BS1 through Aetrix?
Please submit a Request for Quotation (RFQ) for MT9160BS1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MT9160BS1 reliable?
The price and inventory of MT9160BS1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MT9160BS1 is usually 5 days.
3.What payment methods are accepted for MT9160BS1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MT9160BS1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MT9160BS1?
MT9160BS1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MT9160BS1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MT9160BS1?
For technical support, including MT9160BS1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MT9160BS1 requirements.
6.How does Aetrix verify that MT9160BS1 is sourced from the original manufacturer or authorized distributors?
All MT9160BS1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MT9160BS1 meets industry standards.
7.What is the process for return or replacement of MT9160BS1?
All MT9160BS1 units undergo pre-shipment inspection (PSI). If there is an issue with MT9160BS1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MT9160BS1 part is unused and in its original packaging.
Return procedure for MT9160BS1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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