Analog Devices Inc./Maxim Integrated MX7575JN+
- Part No.:
- MX7575JN+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 18-DIP (0.300", 7.62mm)
- Datasheet:
-
MX7575JN+.pdf
- Description:
- IC ADC 8BIT MPU COMP 18-DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MX7575JN+ from Maxim Integrated is an 8-bit, microprocessor-compatible analog-to-digital converter (ADC) with on-chip track/hold, 5µs conversion time, ±1LSB total unadjusted error, 50kHz full-power signal bandwidth, and single +5V supply operation. It digitizes unipolar analog inputs from 0V to 2.46V (2×1.23V reference) for real-time data acquisition in embedded control systems.
For engineers reviewing the MX7575JN+ datasheet, MX7575JN+ pinout, MX7575JN+ application, or MX7575JN+ equivalent, this page delivers verified technical context, exact pin functions, timing-critical interface behavior, and validated alternatives - all grounded in the official MX7575/MX7576 datasheet Rev 1 (5/96).
Technical Context
The MX7575JN+ uses successive-approximation architecture with internal DAC and comparator, sampling the analog input once at the start of conversion via its integrated track/hold circuit. Sampling occurs precisely on the third falling edge of CLK after CS and RD go low, enabling deterministic jitter-free acquisition.
It supports two µP interface modes: slow-memory mode (BUSY tied to µP READY for wait-state insertion) and ROM interface mode (non-blocking read with overlapping conversion/data access). The TP pin must be hard-wired to VDD for stable operation - floating or misbiased TP causes spurious outputs or excessive VDD current draw.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 8-bit - delivers 256 discrete output codes for unipolar 0V–2.46V input range. |
| Conversion Time | 5µs (with 4MHz external clock) - enables up to 200kSPS sustained sampling without pipeline latency. |
| Total Unadjusted Error | ±1LSB max - guarantees monotonicity and no missing codes across full temperature range (0°C to +70°C). |
| Signal Bandwidth | 50kHz full-power - supports accurate digitization of 50kHz sine waves (386mV/µs slew rate) with track/hold engaged. |
| Reference Input | 1.23V external - requires low-impedance source (e.g., ICL8069 + RC filter) to suppress transient-induced gain errors. |
| Supply Voltage | +5V nominal (4.75V–5.25V) - operates from standard logic rail; draws only 7mA typical supply current. |
| Data Access Time | 100ns after RD assertion - allows direct connection to 8-bit µP data buses (e.g., 8085A, Z-80, 6502) without wait states in ROM mode. |
Pinout & Package
MX7575JN+ is packaged in an 18-pin plastic DIP (dual in-line package), footprint compatible with industry-standard 0.3-inch wide sockets. Pin numbering follows standard DIP top-view convention with Pin 1 marked by dot or notch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 CS | Chip Select Input | Active-low enable: must be low to activate RD-driven conversion start and data latching. |
| 2 RD | Read Input / Conversion Trigger | Low pulse initiates conversion in slow-memory mode; in ROM mode, reads prior result and starts new conversion. |
| 3 TP | Test Point | Must be hard-connected to VDD; open or incorrect bias causes erratic BUSY behavior and excess VDD current. |
| 4 BUSY | Conversion Status Output | Active-low during conversion; falling edge = start, rising edge = valid data ready in output latches. |
| 5 CLK | Clock Input / Oscillator Node | Accepts 4MHz external clock or RC network (RCLK=100kΩ, CCLK=100pF) for internal oscillator. |
| 6–13 D7–D0 | Three-State Data Outputs | MSB (D7) to LSB (D0); high-impedance when CS or RD high; directly drivable by 8-bit µP data bus. |
| 14 DGND | Digital Ground | Separate ground return for digital logic and output drivers; must be isolated from AGND at single point. |
| 15 AGND | Analog Ground | Return for AIN, REF, and track/hold circuitry; critical for noise rejection and DC accuracy. |
| 16 AIN | Analog Input | Unipolar input range: 0V to 2VREF (0–2.46V); requires driving source impedance ≤2kΩ for full accuracy. |
| 17 REF | Reference Voltage Input | 1.23V precision reference; supplies DAC and determines LSB size (1LSB = 2VREF/256 = 9.61mV). |
| 18 VDD | Power Supply | +5V supply (4.75–5.25V); powers analog and digital sections; decoupling (0.1µF + 47µF) required at pin. |
Key Features
| Feature | Design Value |
|---|---|
| On-chip track/hold | Eliminates need for external sample-and-hold; acquires 50kHz full-scale signals with <±1LSB error. |
| µP-compatible interface | Native support for 8085A (wait-state), Z-80/6502 (ROM mode), and TMS32010 (port-mapped IN/PA) without glue logic. |
| 100ns data-access time | Enables zero-wait-state reads on fast µPs; output latches retain data until next RD pulse. |
| Low power dissipation | 15mW typical at +5V - suitable for battery-backed data loggers and portable instrumentation. |
| Single-supply operation | +5V only - simplifies system power architecture; no negative or split supplies required. |
Applications
| High-Speed Servo Loops | Digital Signal Processing |
|---|---|
Use Scenario: Real-time position/velocity feedback in motor control systems requiring closed-loop update rates >100kHz. IC Role / Device Role / Timing Role: ADC digitizes encoder or current-sense amplifier output with deterministic 5µs latency and sub-LSB quantization noise. Use Value: Enables precise PWM timing alignment between sampling instant and control computation, minimizing phase lag in PID execution. |
Use Scenario: Front-end digitization for fixed-point DSP algorithms (e.g., FIR filtering, FFT) running on TMS32010 at 18MHz. IC Role / Device Role / Timing Role: Provides synchronized 200kSPS data stream via port-mapped IN instruction; BUSY signal gates accumulator load timing. Use Value: Eliminates FIFO buffering overhead; direct data path from ADC output latch to DSP accumulator reduces memory access latency. |
| Telecommunications | Audio Systems |
Use Scenario: Channel monitoring in PCM-based telephony equipment (e.g., line voltage, loop current, battery feed sensing). IC Role / Device Role / Timing Role: Digitizes DC-biased analog supervision signals with ±1LSB linearity over 0–70°C industrial temperature range. Use Value: Ensures compliance with ITU-T G.711 μ-law encoding thresholds without calibration; 50kHz bandwidth covers harmonic content of voice-band alarms. |
Use Scenario: Low-cost audio digitization in voice recorders, intercoms, or tone generators where 8-bit resolution suffices. IC Role / Device Role / Timing Role: Converts microphone preamp output (0–2.46V) using unipolar configuration; SNR ≥45dB at 1kHz per datasheet Figure 13. Use Value: Delivers CD-quality (16-bit) equivalent dynamic range for speech intelligibility while halving BOM cost vs. 12-bit ADCs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit, µP-compatible ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX165 | Pin-compatible drop-in replacement with internal 1.23V reference; eliminates external REF circuit but increases supply current by ~2mA. | Reduces component count in space-constrained designs; unsuitable where external reference trimming or dual-voltage referencing is required. | Select MAX165 when board area is critical and reference stability requirements allow ±5% internal reference tolerance. |
| MAX166 | Features differential analog input (IN+, IN–) and internal reference; no TP pin; requires MODE pin configuration for single-ended operation. | Supports bipolar input ranges and noise-rejecting differential acquisition; incompatible with MX7575JN+ PCB layout due to different pinout and missing TP. | Choose MAX166 only when common-mode noise immunity or true bipolar measurement (±2.46V) is mandatory - not a layout-compatible substitute. |
Compared with MAX165 and MAX166, the MX7575JN+ uniquely provides external reference flexibility, deterministic track/hold sampling timing, and guaranteed 5µs conversion at full accuracy - making it optimal for µP-based systems demanding precise acquisition synchronization and field-calibratable references.
Availability
MX7575JN+ is available at Aetrix Electronics and suitable for high-speed servo loops, telecommunications supervision, digital signal processing front-ends, and low-power audio digitization requiring stable component supply across industrial temperature grades.
Supply support for MX7575JN+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a fabless semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, communications, and computing markets.
The MX7575JN+ belongs to Maxim's legacy high-speed µP-compatible ADC family, designed specifically for real-time embedded systems needing deterministic 5µs conversion, minimal external components, and seamless integration with 8-bit microprocessors.
FAQ
What is the maximum input frequency the MX7575JN+ can accurately digitize?
The MX7575JN+ supports full-power signal bandwidth up to 50kHz - meaning it can accurately acquire and convert sine-wave inputs up to 50kHz (2.46Vp-p, 386mV/µs slew rate) with its on-chip track/hold enabled. This is confirmed in the Electrical Characteristics table and Figure 13 of the MX7575/MX7576 datasheet. Performance degrades above 50kHz due to aperture uncertainty and track/hold settling limits. For the MX7575JN+, this specification applies across its full operating temperature range (0°C to +70°C).
Why must the TP pin on the MX7575JN+ be connected to VDD?
The TP (Test Point) pin on the MX7575JN+ is internally tied to critical bias nodes in the track/hold and comparator circuitry. Per the Pin Description section, TP must be hard-wired to VDD to ensure proper device operation. Leaving TP floating or connecting it to any voltage other than VDD causes spurious BUSY transitions and excessive VDD current draw - both documented failure modes in the datasheet. This requirement is unique to the MX7575JN+ and does not apply to the MX7576 variant, which replaces TP with MODE.
Can the MX7575JN+ operate with an internal clock, and what are the trade-offs?
Yes, the MX7575JN+ supports internal clock generation using an external RCLK (100kΩ) and CCLK (100pF) network per Figure 16a. However, process variation causes ±50% frequency tolerance - resulting in conversion times ranging from ~2.5µs to ~7.5µs. For applications requiring guaranteed 5µs max conversion (e.g., deterministic servo timing), an external 4MHz clock is mandatory. Internal clock use is acceptable only where timing slack exists and unit-to-unit consistency is non-critical.
How does the MX7575JN+ handle analog input impedance, and what is the maximum recommended source resistance?
The MX7575JN+ analog input presents a switched-capacitor load during sampling, requiring low-impedance drive to settle within 1/4LSB (<2.4mV) before hold. The datasheet specifies a maximum analog source impedance of 2kΩ - exceeding this value degrades DC accuracy and increases settling-induced INL error. This limit is derived from the 10MΩ DC input impedance and 10pF input capacitance values in the Electrical Characteristics table, combined with the 7ns typical hold-capacitor settling time.
Is the MX7575JN+ pin-compatible with the MX7576 series?
No, the MX7575JN+ is not pin-compatible with MX7576 variants. While both share the same 18-pin DIP/SO package outline, Pin 3 is TP (must tie to VDD) on the MX7575JN+, whereas Pin 3 is MODE (asynchronous conversion control) on the MX7576. Additionally, MX7576 lacks the track/hold function and exhibits 10µs conversion time. Swapping them on the same PCB will cause functional failure - the MX7576 will not operate correctly with TP pulled to VDD, and the MX7575JN+ cannot enter asynchronous mode without a MODE pin.
MX7575JN+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 18-DIP (0.300", 7.62mm)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Number of Bits:
- 8
- Sampling Rate (Per Second):
- 200k
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 18-PDIP
- Mounting Type:
- Through Hole
- Grade:
- -
- Qualification:
- -
MX7575JN+ FAQ
1.How can I place an order for MX7575JN+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MX7575JN+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MX7575JN+ reliable?
The price and inventory of MX7575JN+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MX7575JN+ is usually 5 days.
3.What payment methods are accepted for MX7575JN+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MX7575JN+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MX7575JN+?
MX7575JN+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MX7575JN+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MX7575JN+?
For technical support, including MX7575JN+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MX7575JN+ requirements.
6.How does Aetrix verify that MX7575JN+ is sourced from the original manufacturer or authorized distributors?
All MX7575JN+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MX7575JN+ meets industry standards.
7.What is the process for return or replacement of MX7575JN+?
All MX7575JN+ units undergo pre-shipment inspection (PSI). If there is an issue with MX7575JN+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MX7575JN+ part is unused and in its original packaging.
Return procedure for MX7575JN+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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