Analog Devices Inc./Maxim Integrated MX7575JP+
- Part No.:
- MX7575JP+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 20-LCC (J-Lead)
- Datasheet:
-
MX7575JP+.pdf
- Description:
- IC ADC 8BIT SAR 20PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:1,291
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MX7575JP+ from Maxim Integrated is a CMOS, microprocessor-compatible 8-bit analog-to-digital converter with on-chip track/hold, 5µs conversion time, ±1LSB total unadjusted error, 50kHz full-power signal bandwidth, and single +5V supply operation. It digitizes unipolar analog inputs from 0V to 2.46V (2×1.23V reference) for real-time data acquisition in embedded control systems.
For engineers reviewing the MX7575JP+ datasheet, MX7575JP+ pinout, MX7575JP+ application, or MX7575JP+ equivalent, key selection considerations include its PLCC-20 package, 100ns data-access time, BUSY-driven µP interface timing, and compatibility with 8085A, Z-80, 6502, and TMS32010 processors in slow-memory or ROM interface modes.
Technical Context
The MX7575JP+ employs successive-approximation architecture with an internal DAC and comparator, using a 4MHz external clock or RC-based internal oscillator. Its track/hold acquires input on the third falling clock edge after CS/RD assertion, enabling accurate sampling of 50kHz full-scale sine waves (386mV/µs slew rate).
Control logic supports three interface modes: slow-memory (READY-driven wait state), ROM interface (non-blocking read), and - unlike the MX7576 - does not support asynchronous mode. All eight data outputs (D0–D7) are latched and three-state buffered for direct connection to an 8-bit µP data bus.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 8-bit - delivers 256 discrete output codes for unipolar 0V–2.46V input range |
| Conversion Time | 5µs - enables up to 200kSPS sustained sampling without pipeline latency |
| Total Unadjusted Error | ±1LSB max - guarantees monotonicity and no missing codes across temperature |
| Signal Bandwidth | 50kHz full-power - supports accurate digitization of audio-band and servo-loop signals |
| Reference Voltage | 1.23V external - requires stable low-impedance source (e.g., ICL8069 + RC filter) |
| Data Access Time | 100ns - allows direct interfacing to fast µPs like TMS32010 at 18MHz without wait states |
| Supply Voltage | +5V (4.75–5.25V) - compatible with standard TTL/CMOS logic rails and eliminates dual-supply design |
| Power Dissipation | 15mW - enables high-density mixed-signal PCB layouts without thermal derating concerns |
Pinout & Package
MX7575JP+ is housed in a 20-lead plastic leaded chip carrier (PLCC) with J-bend leads, rated for 0°C to +70°C operation. The package provides mechanical robustness and thermal performance suitable for industrial control and telecom modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 11 | AIN | Analog input - accepts 0V to 2VREF (0–2.46V); requires ≤2kΩ source impedance for <±1/4LSB settling |
| 2, 3, 4, 8, 9 | D6, D5, D4–D1 | Three-state data outputs - bits 6, 5, and 4–1; driven only when CS and RD are low |
| 5 | CLK | External clock input / internal oscillator node - accepts 4MHz square wave or RC network (100kΩ/100pF) |
| 6 | D7 (MSB) | Three-state data output - most significant bit; shares timing and drive specs with D0–D6 |
| 7 | TP | Test point - must be hard-wired to VDD; floating or incorrect bias causes spurious operation |
| 10 | D0 (LSB) | Three-state data output - least significant bit; latched at BUSY rising edge |
| 12–15 | AGND, DGND | Analog and digital ground - require separate low-impedance planes joined at single point near REF/VDD decoupling |
| 16 | VDD | +5V power supply - requires 0.1µF ceramic + 47µF bulk capacitor at pin for noise immunity |
| 17 | REF | Reference input - 1.23V nominal; sensitive to transient currents; must be decoupled per Figure 15 |
| 18 | CS | Chip select - active-low enable; initiates conversion when asserted with RD |
| 19 | RD | Read strobe - active-low; controls data latch enable and conversion start in all interface modes |
| 20 | BUSY | Conversion status - low during conversion; rising edge marks data validity and latch update |
Key Features
| Feature | Design Value |
|---|---|
| Built-in track/hold | Enables accurate acquisition of 50kHz full-scale signals without external sample-hold circuitry |
| µP-compatible interface | Direct 8-bit bus connection via CS/RD/BUSY with no glue logic required for 8085A, Z-80, or 6502 |
| Low power consumption | 15mW at +5V allows battery-powered data loggers and portable instrumentation |
| High DC accuracy | ±1LSB TUE and ±1/2LSB offset error ensure calibration-free operation in most industrial sensing applications |
| Robust timing margins | 100ns data-access time and 80ns data-hold time simplify timing closure with legacy µPs |
Applications
| Digital Signal Processing | High-Speed Data Acquisition |
|---|---|
Use Scenario: Real-time spectral analysis of vibration signals in motor control systems using FFT algorithms on TMS32010 DSP. IC Role / Device Role / Timing Role: MX7575JP+ serves as the front-end ADC, sampling at 200kSPS with precise 5µs intervals synchronized to system clock. Use Value: 50kHz signal bandwidth and ±1LSB linearity preserve harmonic content critical for fault detection in rotating machinery. | Use Scenario: Capturing transient waveforms in automated test equipment for semiconductor parametric testing. IC Role / Device Role / Timing Role: MX7575JP+ digitizes analog stimulus responses under µP control, with BUSY-driven handshaking ensuring deterministic capture timing. Use Value: 100ns data-access time and three-state outputs allow seamless integration into shared data bus architectures without contention. |
| Telecommunications | Audio Systems |
Use Scenario: Digitizing analog voice channels in channel bank interfaces prior to PCM encoding. IC Role / Device Role / Timing Role: MX7575JP+ converts conditioned line-level signals (0–2.46V) in µ-law/A-law companding circuits. Use Value: Single +5V supply and low 15mW dissipation reduce power supply complexity and heat in densely packed line cards. | Use Scenario: Sampling microphone preamp outputs in professional audio mixers with real-time level metering. IC Role / Device Role / Timing Role: MX7575JP+ acts as a dedicated monitor ADC, acquiring peak amplitude data at sub-millisecond intervals. Use Value: On-chip track/hold eliminates need for external S/H, reducing BOM count and board space in cost-sensitive audio designs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit, µP-compatible ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX165CPA+ | Pin-compatible with internal 1.23V reference; no external REF required; same 5µs conversion and PLCC-20 package | Eliminates external reference circuitry but lacks flexibility for precision external references | Select MAX165CPA+ when board space or reference stability is constrained; MX7575JP+ preferred when reference voltage trimming or alternate reference values are needed |
| ADC0804LCN | 8-bit, µP-compatible, but uses resistor ladder (not SAR); 100µs conversion time; DIP-20 package; no track/hold | Suitable for slower, low-cost monitoring but cannot resolve 50kHz signals or support high-speed servo loops | Choose ADC0804LCN for cost-sensitive, non-critical DC measurements; MX7575JP+ is mandatory for dynamic signal fidelity and timing-critical acquisition |
Compared with MAX165CPA+, MX7575JP+ offers external reference flexibility at the cost of one additional component; compared with ADC0804LCN, it delivers 20× faster conversion, integrated track/hold, and superior AC performance - making it essential for closed-loop control and real-time signal processing.
Availability
MX7575JP+ is available at Aetrix Electronics and suitable for high-speed data acquisition, telecommunications infrastructure, and audio signal processing requiring stable component supply across extended production cycles.
Supply support for MX7575JP+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, communications, and computing applications.
The MX7575JP+ belongs to Maxim's legacy high-speed ADC product line, engineered specifically for µP-based systems needing fast, accurate, and easy-to-interface 8-bit conversion without external support components.
FAQ
What is the maximum input signal frequency the MX7575JP+ can accurately digitize?
The MX7575JP+ supports a full-power signal bandwidth of 50kHz, meaning it can accurately acquire and convert sine-wave inputs up to 50kHz at full scale (2.46VPP) with ≤±1LSB error. This is enabled by its on-chip track/hold and 386mV/µs slew rate capability. For higher-frequency signals, amplitude must be reduced to maintain SNR above 45dB per the datasheet's Figure 13.
Does the MX7575JP+ require an external clock, or can it operate with an internal oscillator?
The MX7575JP+ supports both external and internal clocking. With an external 4MHz clock applied to the CLK pin, conversion time is tightly controlled at 5µs. Alternatively, an RC network (100kΩ + 100pF) on CLK enables internal oscillation, though frequency may vary ±50% due to process variation. Use external clocking when timing precision is critical for system synchronization.
How should the TP (test point) pin be connected on the MX7575JP+?
The TP pin on the MX7575JP+ must be hard-wired to VDD. Leaving it open or connecting it to any voltage other than VDD may cause spurious operation or excessive current draw from the supply. This requirement is specific to the MX7575JP+ and differs from the MX7576's MODE pin; incorrect TP bias directly compromises conversion reliability.
Can the MX7575JP+ interface directly with a Z-80 microprocessor?
Yes, the MX7575JP+ supports direct Z-80 interfacing in ROM interface mode. As shown in Figure 7 of the datasheet, MREQ and RD drive CS and RD respectively, while BUSY connects to WAIT. The 100ns data-access time and three-state outputs eliminate need for address latches or bus transceivers, enabling clean integration with Z-80-based industrial controllers and retro-computing platforms.
What is the recommended decoupling for the REF pin of the MX7575JP+?
The REF pin of the MX7575JP+ requires low-impedance AC and DC decoupling to suppress transient currents drawn during conversion. Maxim recommends the circuit in Figure 15: ICL8069 shunt reference buffered by 3.3kΩ, with 0.1µF ceramic and 47µF bulk capacitors to AGND. This configuration maintains <±5ppm/°C tempco and prevents reference-induced gain errors exceeding ±1/2LSB.
MX7575JP+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 20-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 8
- Sampling Rate (Per Second):
- 200k
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 20-PLCC (9x9)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
MX7575JP+ FAQ
1.How can I place an order for MX7575JP+ through Aetrix?
Please submit a Request for Quotation (RFQ) for MX7575JP+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MX7575JP+ reliable?
The price and inventory of MX7575JP+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MX7575JP+ is usually 5 days.
3.What payment methods are accepted for MX7575JP+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MX7575JP+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MX7575JP+?
MX7575JP+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MX7575JP+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MX7575JP+?
For technical support, including MX7575JP+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MX7575JP+ requirements.
6.How does Aetrix verify that MX7575JP+ is sourced from the original manufacturer or authorized distributors?
All MX7575JP+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MX7575JP+ meets industry standards.
7.What is the process for return or replacement of MX7575JP+?
All MX7575JP+ units undergo pre-shipment inspection (PSI). If there is an issue with MX7575JP+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MX7575JP+ part is unused and in its original packaging.
Return procedure for MX7575JP+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MX7575JP+ Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

