NXP Semiconductors N74F138D,623
- Part No.:
- N74F138D,623
- Manufacturer:
- NXP Semiconductors
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
N74F138D,623.pdf
- Description:
- IC DECODER/DEMUX 1 X 3:8 16SO
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
N74F138D,623 from NXP Semiconductors (formerly Philips) is a 1-of-8 decoder/demultiplexer IC with active-low outputs, three binary address inputs (A0–A2), and three enable inputs (E0, E1 low-active; E2 high-active). It delivers 5.8 ns typical propagation delay, 13 mA typical supply current, and operates across industrial temperature range (–40°C to +85°C) at VCC = 5.0 V ±10%. It is used for memory chip select decoding in embedded control systems.
For engineers reviewing the N74F138D,623 datasheet, N74F138D,623 pinout, N74F138D,623 application, or N74F138D,623 equivalent, key selection criteria include enable input logic polarity, output drive capability (20 mA sink), propagation delay symmetry across address vs. enable paths, and SO16 package compatibility with automated SMT assembly.
Technical Context
The N74F138D,623 implements combinational logic decoding with fully decoded 3-to-8 active-low outputs. Its triple-enable architecture (E0, E1 low-active; E2 high-active) enables cascading up to 1-of-32 decoding using four devices and one inverter - no external logic beyond the inverter is required for expansion.
All outputs are open-collector compatible with TTL/LS loads, supporting fan-out of 50 high / 33 low units. Input thresholds are VIH ≥ 2.0 V and VIL ≤ 0.8 V at VCC = 5.0 V, ensuring robust noise margin in mixed-logic systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Function | 1-of-8 decoder / demultiplexer with active-low outputs |
| Propagation Delay (A→Q) | 5.8 ns typical - determines maximum clock/data rate in address decode paths |
| Supply Current (ICC) | 13 mA typical at VCC = 5 V - sets baseline power budget for logic subsystems |
| Output Drive (IOL) | 20 mA sink per output - supports direct driving of TTL inputs or small LEDs |
| Operating Temperature | –40°C to +85°C - qualified for industrial-grade embedded control environments |
| Input Voltage Thresholds | VIH ≥ 2.0 V, VIL ≤ 0.8 V - ensures interoperability with standard 5 V TTL logic families |
| Package | SO16 (SOT109-1), 3.9 mm body width - surface-mount compatible with IPC-7351B land patterns |
Pinout & Package
Package: Plastic small outline (SO16), 16-pin, 3.9 mm body width, JEDEC MS-012 compliant (SOT109-1).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | E0 (Enable 0) | Active-low enable input; must be low with E1 low and E2 high for any output activation |
| 2 | E1 (Enable 1) | Active-low enable input; paired with E0 to gate decoder operation |
| 3 | E2 (Enable 2) | Active-high enable input; completes 3-input enable condition for output assertion |
| 4 | A0 | LSB address input; selects output Q0/Q1/Q2/Q3 when A1/A2 fixed |
| 5 | A1 | Mid-bit address input; selects output pair (e.g., Q0–Q1 or Q2–Q3) |
| 6 | A2 | MSB address input; selects output group (Q0–Q3 or Q4–Q7) |
| 7 | Q7 | Active-low decoded output; asserted only when A2A1A0 = 111 and enables active |
| 8 | GND | Ground reference for all internal logic and output stages |
| 9 | Q6 | Active-low decoded output; asserted only when A2A1A0 = 110 and enables active |
| 10 | Q5 | Active-low decoded output; asserted only when A2A1A0 = 101 and enables active |
| 11 | Q4 | Active-low decoded output; asserted only when A2A1A0 = 100 and enables active |
| 12 | Q3 | Active-low decoded output; asserted only when A2A1A0 = 011 and enables active |
| 13 | Q2 | Active-low decoded output; asserted only when A2A1A0 = 010 and enables active |
| 14 | Q1 | Active-low decoded output; asserted only when A2A1A0 = 001 and enables active |
| 15 | Q0 | Active-low decoded output; asserted only when A2A1A0 = 000 and enables active |
| 16 | VCC | +5 V supply input; decoupling capacitor required within 10 mm of pin |
Key Features
| Feature | Design Value |
|---|---|
| Triple enable architecture | Enables hierarchical decoding: two low-active (E0/E1) + one high-active (E2) allows clean cascade without level-shifting |
| Demultiplexing mode | One enable input (e.g., E0) serves as data path; remaining enables act as strobes - eliminates need for external gating logic |
| Industrial temperature rating | –40°C to +85°C operation confirmed per datasheet - supports deployment in motor drives and PLC I/O modules |
| High fan-out capability | 33 low-unit fan-out per output - drives multiple TTL inputs directly without buffers in bus arbitration logic |
| Low propagation skew | Max 9.0 ns delay variation between A→Q and E→Q paths - preserves timing integrity in synchronous decode trees |
Applications
| Memory Address Decoding | Peripheral Chip Select Logic |
|---|---|
|
Use Scenario: Selecting one of eight SRAM or EPROM chips in a microcontroller-based data acquisition system. IC Role / Device Role / Timing Role: Decoder mapping 3-bit address lines to individual /CS signals; outputs drive /CE pins with <9 ns setup margin. Use Value: Eliminates discrete NAND gate networks; reduces board area by 40% versus discrete logic implementation. |
Use Scenario: Enabling specific UART, ADC, or GPIO expanders on an industrial controller backplane. IC Role / Device Role / Timing Role: Demultiplexer routing a shared address/data bus to eight peripheral ICs; E2 tied to CPU /IORQ. Use Value: Enables hot-swap-safe peripheral selection via controlled enable sequencing - prevents bus contention during insertion. |
| LED Segment Driver Control | PLC I/O Module Addressing |
|
Use Scenario: Driving eight 7-segment LED displays in multiplexed configuration using common-cathode topology. IC Role / Device Role / Timing Role: Active-low outputs directly sink LED current (≤20 mA each); A0–A2 sequenced by microcontroller timer. Use Value: Removes need for external transistor arrays - simplifies BOM and improves reliability in panel-mounted HMI units. |
Use Scenario: Assigning unique addresses to eight digital input/output modules in a modular programmable logic controller rack. IC Role / Device Role / Timing Role: Address decoder asserting module-specific /ENABLE lines; E0/E1 driven by rack ID, E2 by master sync pulse. Use Value: Supports deterministic module enumeration without firmware configuration - reduces commissioning time by 25%. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 1-of-8 decoder applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74F138N | DIP-16 package; identical electrical specs and pinout; no thermal pad; higher parasitic inductance | Suitable for prototyping or through-hole production; not recommended for high-frequency or vibration-prone environments | Select SN74F138N only when manual soldering or legacy DIP footprint reuse is required. |
| 74ACT138SCX | Advanced CMOS (ACT) family; 3.3 V / 5 V tolerant; 8.5 ns max tPD; lower ICC (4 mA typ); different input thresholds (VIH = 2.0 V min at VCC = 3.3 V) | Required for mixed-voltage systems with 3.3 V controllers; incompatible with pure 5 V TTL buses without level translation | Choose 74ACT138SCX only when interfacing with 3.3 V microcontrollers and strict power budget constraints apply. |
Compared with N74F138D,623, SN74F138N offers identical logic behavior but lacks SMT manufacturability, while 74ACT138SCX provides lower power and voltage flexibility at the cost of TTL-level compatibility - making N74F138D,623 the optimal choice for legacy 5 V industrial control designs requiring SO16 reliability.
Availability
N74F138D,623 is available at Aetrix Electronics and suitable for memory address decoding, peripheral chip select logic, and LED segment driver control requiring stable component supply across industrial temperature ranges and long-lifecycle production programs.
Supply support for N74F138D,623 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The 74F logic family - including the N74F138D,623 - was designed by Philips (now NXP) for high-speed, low-power 5 V TTL-compatible digital control systems in industrial automation and instrumentation.
FAQ
What is the operating voltage range for the N74F138D,623?
The N74F138D,623 operates over VCC = 4.5 V to 5.5 V, with recommended nominal supply at 5.0 V ±10%. Absolute maximum supply voltage is +7.0 V, but sustained operation above 5.5 V risks parametric shift and reduced reliability. The N74F138D,623 is not rated for 3.3 V operation - attempting to power it at 3.3 V will result in undefined logic states and excessive input leakage.
Does the N74F138D,623 support cascading to build larger decoders?
Yes, the N74F138D,623 supports cascading to implement 1-of-32 decoding using four devices and one inverter, as documented in Figure 1 of the original Philips datasheet. The triple-enable structure (E0, E1 low-active; E2 high-active) allows hierarchical gating without additional logic gates - E0 and E1 of upper-level devices are driven by decoded bits from lower-level outputs, while E2 is synchronized globally.
What is the maximum output sink current per pin on the N74F138D,623?
The N74F138D,623 guarantees 20 mA sink current per output (IOL) under recommended operating conditions (VCC = 4.5–5.5 V, Tamb = –40°C to +85°C). This is sufficient to drive standard TTL inputs or small indicator LEDs directly. Exceeding 20 mA risks exceeding VOL specification (0.50 V max) and may cause thermal stress - the N74F138D,623 does not support parallel output tying for higher current.
Is the N74F138D,623 pin-compatible with other 74-series 1-of-8 decoders?
The N74F138D,623 is pin-compatible with all industry-standard 74F138 variants in SO16 (SOT109-1) packaging, including NXP's own I74F138D and legacy Philips versions. Pin assignments match JEDEC MS-012 - A0–A2, E0–E2, Q0–Q7, VCC, and GND occupy identical positions. However, it is not pin-compatible with 74LS138 or 74HC138 due to differing output drive architecture and voltage thresholds.
Can the N74F138D,623 be used as a demultiplexer?
Yes, the N74F138D,623 can function as an 1-to-8 demultiplexer by using one enable input (e.g., E0) as the data input and the remaining enables (E1, E2) plus address lines (A0–A2) as control signals. When configured this way, the N74F138D,623 routes a single active-low data stream to one of eight outputs based on the 3-bit address - no external components are needed beyond proper enable biasing.
N74F138D,623 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74F
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Decoder/Demultiplexer
- Circuit:
- 1 x 3:8
- Independent Circuits:
- 1
- Current - Output High, Low:
- 1mA, 20mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
N74F138D,623 FAQ
1.How can I place an order for N74F138D,623 through Aetrix?
Please submit a Request for Quotation (RFQ) for N74F138D,623 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for N74F138D,623 reliable?
The price and inventory of N74F138D,623 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for N74F138D,623 is usually 5 days.
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Once your N74F138D,623 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for N74F138D,623?
For technical support, including N74F138D,623 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your N74F138D,623 requirements.
6.How does Aetrix verify that N74F138D,623 is sourced from the original manufacturer or authorized distributors?
All N74F138D,623 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that N74F138D,623 meets industry standards.
7.What is the process for return or replacement of N74F138D,623?
All N74F138D,623 units undergo pre-shipment inspection (PSI). If there is an issue with N74F138D,623, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The N74F138D,623 part is unused and in its original packaging.
Return procedure for N74F138D,623:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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