Monolithic Power Systems Inc. NB6381DL-LF-Z

Overview

NB6381DL-LF-Z from Monolithic Power Systems is a fully integrated, high-frequency synchronous step-down DC/DC converter delivering 8A continuous output current across 4.5V–28V input range. It features internal 30mΩ high-side and 12mΩ low-side MOSFETs, Constant-On-Time (COT) control for sub-1µs load transient response, and supports adjustable output voltage from 0.8V to 13V - deployed in notebook I/O power rails requiring fast regulation and compact footprint.

For engineers reviewing the NB6381DL-LF-Z datasheet, NB6381DL-LF-Z pinout, NB6381DL-LF-Z application, or NB6381DL-LF-Z equivalent, key selection criteria include its QFN20 (3×4mm) thermal performance (θJA = 48°C/W), programmable soft-start timing via external capacitor, and integrated protections: OCP, SCP, OVP, UVP, and thermal shutdown with 25°C hysteresis.

Technical Context

The NB6381DL-LF-Z employs Constant-On-Time (COT) control with line feed-forward via the FREQ pin, enabling stable operation across wide VIN and VOUT ranges without external compensation. Its internal power stage integrates matched HS/LS MOSFETs with precise RDS(on) matching (30mΩ/12mΩ) and dead-time control to prevent shoot-through.

It operates in CCM at heavy loads (≥1.2A typical critical current) and automatically transitions to skip mode below that threshold, maintaining >85% efficiency at 1mA load. The PGOOD open-drain output provides 1ms delay referenced to SS ramp time, with rising/falling thresholds at 90%/85% of VFB.

Key Specifications

Pinout & Package

Package: QFN20 (3mm × 4mm, 0.5mm pitch) with exposed thermal pad on underside - requires solder paste stencil aperture ≥80% coverage and ≥6 thermal vias to inner ground plane for θJA = 48°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous step-down converter applications.

Compared with MPQ4572GQB-AEC1-Z and RT7295BGJ8F, NB6381DL-LF-Z offers superior transient response due to proprietary switching loss reduction and tighter VFB tolerance (±10mV), while providing integrated PGOOD and FREQ-based frequency tuning - making it optimal for space-constrained, high-dynamic-load computing and networking systems.

Availability

NB6381DL-LF-Z is available at Aetrix Electronics and suitable for notebook I/O power, optical transceiver biasing, distributed POL systems, and industrial embedded controllers requiring stable component supply with full traceability and long-term lifecycle support.

Supply support for NB6381DL-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, headquartered in Kirkland, WA, with global design and support centers.

The NB6381 belongs to MPS's high-current synchronous buck converter product line, engineered for compact, high-efficiency DC/DC conversion in computing, networking, and optical infrastructure where thermal density and transient response are critical.

FAQ

What is the minimum recommended output capacitance for stable operation at 1.05V/8A?

A minimum of 220µF total output capacitance is required - achieved using parallel 100µF POSCAP + 12×22µF X5R ceramics - to ensure <15mVpp ripple and sufficient ESR for COT stability without external ramp compensation. Ceramic-only designs require R4/C4 ramp circuit per Equation 5 in the datasheet.

How does the NB6381DL-LF-Z handle short-circuit conditions?

It triggers immediate SCP latch-off when FB drops below 50% of VREF (≤408mV) during current limit activation - disabling both HS and LS FETs until input power cycle. This differs from OCP, which uses a 40µs timer before latching, allowing brief overloads without shutdown.

Can the switching frequency be synchronized to an external clock?

No - the NB6381DL-LF-Z uses self-oscillating Constant-On-Time control with frequency set solely by the R7 resistor on the FREQ pin. It lacks an external SYNC input, so multi-phase synchronization requires master-slave current-sharing schemes or external clock injection via FREQ pin modulation (not recommended for production).

What is the maximum allowable thermal pad solder mask opening for QFN20 package?

The thermal pad solder mask opening must match the pad metal area exactly (3.0mm × 4.0mm) - no solder mask dam - to ensure full solder fillet formation and optimal θJC. Oversized openings cause solder wicking; undersized ones reduce thermal conduction and risk voiding.

Does the EN pin support voltage-controlled sequencing with a resistor divider?

Yes - the EN pin has 1.05–1.60V rising threshold and 250–550mV hysteresis, enabling precise power-up sequencing via resistor divider from a higher-voltage rail (e.g., 3.3V or 5V). A 100kΩ pull-up to VIN provides automatic start; adding a capacitor to EN adds delay for staggered turn-on.

Is the VCC pin internally regulated, and what load can it drive?

Yes - VCC is a 5V internal LDO with ±5% regulation under 5mA load. It powers gate drivers only; external circuits (e.g., bias resistors, level shifters) must be powered separately. Do not connect loads >1mA to VCC to avoid regulation error or dropout.

What layout practices prevent noise coupling into the FB pin?

Route FB traces away from SW, IN, and PGND; use guard ring tied to AGND around FB net; place R1/R2 close to IC with shortest possible connections; avoid sharing AGND return with high-current PGND paths. A 1nF capacitor from FB to AGND improves high-frequency noise immunity.