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Monolithic Power Systems Inc. NB671LAGQ-P
- Part No.:
- NB671LAGQ-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 16-PowerVFQFN
- Datasheet:
-
NB671LAGQ-P.pdf
- Description:
- IC REG BUCK ADJ 6A 16QFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,396
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Product details
Overview
NB671LAGQ-P from Monolithic Power Systems is a high-current, synchronous step-down DC/DC converter optimized for compact 5.5V–24V input systems delivering up to 6A continuous and 9A peak output current. It integrates low-RDS(ON) MOSFETs (30 mΩ HS / 15 mΩ LS), employs Constant-On-Time (COT) control for fast transient response, and features LP#-enabled low-power mode (120 μA quiescent current). It is deployed in laptop power rails, tablet core voltage regulation, and flat-panel display logic supplies.
For engineers reviewing the NB671LAGQ-P datasheet, NB671LAGQ-P pinout, NB671LAGQ-P application, or NB671LAGQ-P equivalent, key selection considerations include its 500 kHz switching frequency, 0.604 V–5.5 V adjustable output, integrated power-good (PG) signal with 95%/85% VREF thresholds, thermal shutdown at 150°C, and QFN16 (3 mm × 3 mm) package with exposed thermal pad.
Technical Context
The NB671LAGQ-P implements a proprietary COT control architecture with internal ramp compensation, enabling stable operation with ceramic output capacitors without external compensation. Its valley-current overcurrent protection uses the low-side MOSFET's RDS(ON) as a sensing element, triggering cycle-by-cycle limiting at 7.8–9.5 A.
It integrates dual MOSFET drivers, a 5 V internal LDO (VCC), and a dedicated LP# pin that reduces quiescent current to 60 μA in low-power mode. The device supports 5.5 V input-to-5 V output conversion via adaptive minimum off-time extension, lowering switching frequency to ~150 kHz under near-dropout conditions while maintaining tight output ripple.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 5.5 V to 24 V - Supports wide industrial and computing input rails including 12 V and 19 V adapters. |
| Output Current | 6 A continuous / 9 A peak - Sustains full load in compact form factor without external current-sense resistors. |
| Quiescent Current | 120 μA (typ.) - Enables >90% efficiency at light loads in battery-backed or always-on systems. |
| Switching Frequency | 400–600 kHz (typ. 500 kHz) - Balances EMI performance and inductor size; drops to ~150 kHz at 5.5 VIN/5 VOUT. |
| Reference Voltage | 604 mV ±6 mV - Sets precise output accuracy; enables 1% output tolerance with standard resistor dividers. |
| Thermal Shutdown | 150°C with 25°C hysteresis - Protects against sustained overload or poor PCB thermal design without latch-up. |
| Power Good Threshold | 95% VREF rising / 85% VREF falling - Provides reliable system sequencing with 0.5 ms delay and open-drain output. |
| OCP Trip Level | 7.8–9.5 A valley current - Limits inductor current before output collapse; resets on EN toggle or VIN cycle. |
Pinout & Package
Package: QFN16 (3 mm × 3 mm), thermally enhanced with exposed pad (pins 8 & 9).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VIN | Primary input supply | Accepts 5.5–24 V; requires local bulk capacitance and low-impedance PCB routing. |
| 2 PGND | Power ground return | Low-impedance path for high di/dt switch currents; must connect directly to exposed pad. |
| 3 LP# | Low-power mode enable | Active-low input; reduces IQ to 60 μA when asserted, improving light-load efficiency. |
| 4 PG | Open-drain power-good indicator | Signals VOUT ≥95% VREF; requires external pull-up to VCC or system rail. |
| 7 VOUT | Output voltage sense | Direct connection to output capacitor; critical for regulation accuracy and stability. |
| 10 BST | Bootstrap supply node | Connects to SW via 0.1 μF ceramic capacitor; enables high-side gate drive above VIN. |
| 11 VCC | Internal 5 V LDO output | Powers control circuitry; requires ≥1 μF X7R/X5R ceramic decoupling adjacent to pin. |
| 12 FB | Feedback reference input | Resistor divider tap point; sets output voltage; sensitive to noise-avoid vias and long traces. |
| 13 EN | Enable control input | Digital ON/OFF control; 1.25 V threshold with 100 mV hysteresis; must not be left floating. |
| 14 AGND | Analog ground reference | Reference for FB divider and internal reference; separate from PGND for improved load regulation. |
| 15–16 SW | Switch node | Drives external inductor; experiences full VIN swing and negative flyback; requires minimal loop area. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated MOSFETs with ultra-low RDS(ON) | 30 mΩ (HS) / 15 mΩ (LS) - Reduces conduction loss and eliminates external FETs and drivers. |
| Proprietary switching loss reduction | Optimized dead-time control and gate drive timing - Minimizes shoot-through risk and improves full-load efficiency. |
| Internal soft-start | 1.8 ms ramp time - Prevents inrush current and output overshoot during startup; supports pre-biased outputs. |
| Output discharge function | 6 Ω internal MOSFET from VOUT to PGND - Safely discharges output when disabled, avoiding reverse current through LS-FET. |
| Full fault protection suite | OCP (valley-current), OVP (130% VREF), UVP (60% VREF), UVLO (4.76 V), thermal shutdown - Latch-off reset via EN or VIN cycle. |
Applications
| Laptop CPU Core Supply | Tablet SoC Power Rail |
|---|---|
|
Use Scenario: Regulating 0.8–1.2 V core voltage for Intel/AMD mobile processors under dynamic load from 0.1 A to 6 A. IC Role / Device Role / Timing Role: Primary synchronous buck controller managing transient response, thermal headroom, and power-state coordination via LP#. Use Value: COT control delivers <50 μs load-step response; LP# pin enables OS-directed low-power states without external logic. |
Use Scenario: Generating 1.8 V I/O and 0.9 V GPU voltages in space-constrained tablets with shared 12 V input bus. IC Role / Device Role / Timing Role: High-efficiency point-of-load regulator with integrated PG signaling for coordinated system boot and sleep/wake sequencing. Use Value: 120 μA quiescent current extends battery life in standby; PG output ensures safe SoC reset before voltage collapse. |
| Flat Panel Display Logic Supply | Distributed Telecom Power System |
|
Use Scenario: Providing stable 3.3 V or 5 V for display timing controllers (TCON), backlight drivers, and interface ICs in LCD/LED panels. IC Role / Device Role / Timing Role: Secondary buck stage stepping down 12 V or 24 V panel supply to logic-level rails with tight line/load regulation. Use Value: 1% reference voltage and internal compensation ensure <±1% output accuracy across temperature and line variation. |
Use Scenario: Local 5 V/6 A regulation in distributed 48 V telecom systems using intermediate bus architecture (IBA). IC Role / Device Role / Timing Role: High-density POL converter supporting hot-swap and redundancy requirements in modular power shelves. Use Value: QFN16 package with exposed pad enables >2 W dissipation on 4-layer PCB; thermal shutdown prevents cascade failure. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-current synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2451DT-LF-Z | Lower 3 A output rating; fixed 5 V output; no LP# pin or PG signal; 340 kHz switching. | Suitable only for non-critical 5 V rails where sequencing and low-IQ are not required. | Select only if cost sensitivity outweighs programmability, protection, and efficiency needs. |
| RT7290AZSP | 6 A rated but uses external MOSFETs; requires gate drivers and current-sense resistors; no integrated VCC LDO. | Used where thermal management demands discrete FETs or where BOM flexibility justifies added complexity. | Choose only when board layout allows larger footprint and design team owns gate-drive optimization. |
Compared with MP2451DT-LF-Z and RT7290AZSP, the NB671LAGQ-P delivers higher integration (MOSFETs, VCC LDO, PG, LP#), superior light-load efficiency, and tighter output accuracy-making it optimal for space- and performance-constrained computing and display applications.
Availability
NB671LAGQ-P is available at Aetrix Electronics and suitable for laptop computer power subsystems, tablet PC SoC regulation, and flat-panel television logic supplies requiring stable component supply throughout product lifecycle.
Supply support for NB671LAGQ-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with expertise in DC/DC conversion, motor drivers, and LED lighting controllers.
The NB671LAGQ-P belongs to MPS's NB67x family of high-current synchronous buck converters, designed specifically for compact, high-efficiency point-of-load regulation in portable and display electronics where thermal density and light-load performance are critical.
FAQ
What is the function of the LP# pin, and how does it affect efficiency?
The LP# (Low Power) pin is an active-low input that reduces the NB671LAGQ-P's quiescent current from 120 μA to 60 μA when asserted. This lowers static power draw in standby or light-load states, directly improving light-load efficiency-especially critical in battery-powered laptops and tablets where idle current dominates energy budget.
Can the NB671LAGQ-P operate with a 5.5 V input and 5 V output?
Yes. The NB671LAGQ-P supports near-dropout operation by extending minimum off-time, reducing switching frequency to ~150 kHz at 5.5 VIN/5 VOUT. Its COT control maintains stability and low output ripple even under this condition, enabling direct 5 V generation from USB PD or low-voltage adapters without external compensation.
How is overcurrent protection implemented, and what triggers latch-off?
OCP uses valley-current sensing via the low-side MOSFET's RDS(ON), tripping at 7.8–9.5 A. When triggered, the high-side switch disables and the low-side remains on until inductor current reaches zero. Fault latching occurs only after sustained OCP, UVP, OVP, UVLO, or thermal events-and is reset exclusively by pulling EN low or cycling VIN.
What is the recommended layout practice for the SW and BST pins?
SW and BST require minimal loop area: place the 0.1 μF BST capacitor directly between SW and BST pins with short, wide traces; route SW to the inductor with multiple vias to PGND; avoid routing sensitive signals (FB, EN, LP#) near SW. These practices suppress EMI and prevent false triggering of protection circuits.
Does the NB671LAGQ-P support pre-biased output startup?
Yes. During pre-biased startup, the NB671LAGQ-P disables both high- and low-side switches until the internal reference voltage exceeds the sensed FB voltage. This prevents reverse current flow into the output capacitor and avoids damaging downstream circuitry-a key requirement in hot-plug and multi-rail systems.
What is the role of the AGND pin, and why is it separate from PGND?
AGND serves as the reference ground for the feedback divider, internal reference, and error amplifier-ensuring accurate voltage regulation. Separating AGND from PGND prevents high di/dt switching noise from coupling into the feedback path, which would degrade load regulation and cause instability, especially with ceramic output capacitors.
Is the NB671LAGQ-P still in active production, and what is its lifecycle status?
The NB671LAGQ-P is marked End-of-Life (EOL) by Monolithic Power Systems per Rev. 1.01 datasheet (2014). Aetrix Electronics maintains legacy inventory and offers lifecycle coordination-including last-time buy planning, cross-reference support, and obsolescence mitigation-for customers transitioning to newer MPS alternatives like the MPQ4572 series.
NB671LAGQ-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 16-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 5V
- Voltage - Input (Max):
- 22V
- Voltage - Output (Min/Fixed):
- 0.604V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 6A
- Frequency - Switching:
- 500kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (3x3)
NB671LAGQ-P FAQ
1.How can I place an order for NB671LAGQ-P through Aetrix?
Please submit a Request for Quotation (RFQ) for NB671LAGQ-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NB671LAGQ-P reliable?
The price and inventory of NB671LAGQ-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NB671LAGQ-P is usually 5 days.
3.What payment methods are accepted for NB671LAGQ-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NB671LAGQ-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NB671LAGQ-P?
NB671LAGQ-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NB671LAGQ-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NB671LAGQ-P?
For technical support, including NB671LAGQ-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NB671LAGQ-P requirements.
6.How does Aetrix verify that NB671LAGQ-P is sourced from the original manufacturer or authorized distributors?
All NB671LAGQ-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NB671LAGQ-P meets industry standards.
7.What is the process for return or replacement of NB671LAGQ-P?
All NB671LAGQ-P units undergo pre-shipment inspection (PSI). If there is an issue with NB671LAGQ-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NB671LAGQ-P part is unused and in its original packaging.
Return procedure for NB671LAGQ-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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