Monolithic Power Systems Inc. NB671LGQ-Z

Overview

NB671LGQ-Z from Monolithic Power Systems is a high-efficiency, 5.5V–24V input synchronous step-down DC/DC converter delivering 6A continuous and 9A peak output current with 120μA quiescent current. It employs Constant-On-Time (COT) control for fast transient response, integrates low-R_DS(ON) MOSFETs (30mΩ HS / 15mΩ LS), and supports adjustable output from 0.604V to 5.5V - ideal for powering core logic rails in space-constrained portable electronics.

For engineers reviewing the NB671LGQ-Z datasheet, NB671LGQ-Z pinout, NB671LGQ-Z application, or NB671LGQ-Z equivalent, key selection considerations include its LP#-enabled low-power mode (60μA IQ), open-drain power-good signal with 95%/85% V_REF thresholds, thermal shutdown at 150°C, and QFN16 (3mm×3mm) package with exposed pad for thermal performance.

Technical Context

The NB671LGQ-Z implements COT control with internal ramp compensation, enabling stable operation with ceramic output capacitors without external ESR dependency. Its valley-current OCP uses the low-side MOSFET's R_DS(ON) for cycle-by-cycle protection, with a fixed 8.5A typical trip level.

It features dual-mode operation: PWM in CCM (400–600kHz switching frequency above critical load) and skip-mode DCM at light loads to maintain high efficiency. The LP# pin enables ultra-low-quiescent-current mode (60μA), reducing standby losses in battery-powered systems.

Key Specifications

Pinout & Package

Package: QFN16 (3mm × 3mm), thermally enhanced with exposed pad (pins 8 & 9). Pin 1 marked via top-side dot; pin 1 is VIN.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous step-down converter applications.

Compared with MP2451DT-LF-Z and RT7295BGJ8F, the NB671LGQ-Z uniquely combines 6A integration, 0.604V–5.5V adjustability, LP#-enabled 60μA IQ, and internal output discharge - making it optimal for compact, battery-sensitive, and dynamically scaled power rails where full integration and low standby loss are mandatory.

Availability

NB671LGQ-Z is available at Aetrix Electronics and suitable for laptop computer power delivery, tablet PC SoC supplies, flat panel display logic rails, and distributed telecom power modules requiring stable component supply throughout product lifecycles.

Supply support for NB671LGQ-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with over two decades of leadership in DC/DC conversion, motor drivers, and LED lighting solutions.

The NB671LGQ-Z belongs to MPS's NB67x family of high-current synchronous buck converters, designed specifically for space-constrained, high-efficiency applications in portable computing and consumer electronics where thermal density and light-load efficiency are critical.

FAQ

What is the function of the LP# pin, and how should it be configured?

The LP# pin is an active-low input that enables ultra-low-quiescent-current mode (60μA). When pulled low, it reduces bias current in control circuits without affecting regulation performance. If unused, connect LP# to VCC via a ≥1MΩ resistor to disable low-power mode. Do not leave it floating, as noise may cause erratic IQ transitions.

Can the NB671LGQ-Z operate with a 5.5V input and 5V output?

Yes - the NB671LGQ-Z supports 5.5V-to-5V conversion using its adaptive COT control. At this input-output differential, switching frequency drops to ~150kHz to maintain regulation, and inductor current ripple remains minimal due to the narrow duty cycle (~95.5%), enabling stable operation with low-ESR ceramic output capacitors.

How does the power-good (PG) signal behave during startup and fault conditions?

The PG pin is an open-drain output pulled low until V_FB reaches 95% of V_REF, then goes high after a 0.5ms delay. It asserts low again if V_FB falls below 85% V_REF. During OVP/UVP/latch faults, PG remains low until EN is toggled or VIN is cycled - providing unambiguous system-level power status and sequencing control.

Is external ramp compensation required for stability with ceramic output capacitors?

No - the NB671LGQ-Z includes internal ramp compensation optimized for ceramic capacitors, eliminating the need for external ramp networks in most designs. External ramp (R4/C4) is only recommended if instability persists under heavy transient loads or with very low-ESR (<5mΩ) MLCC arrays - per Equation 3 in the datasheet.

What thermal derating guidance applies for continuous 6A operation?

At 25°C ambient and with proper PCB copper area (≥4 cm² 2oz copper on top/bottom layers connected to exposed pad), the NB671LGQ-Z sustains 6A continuously. Above 60°C ambient, output current must be linearly derated per θ_JA = 70°C/W; at 85°C ambient, maximum continuous current is ~4.2A to stay below 125°C junction limit.

Does the NB671LGQ-Z support pre-biased output startup?

Yes - the device detects pre-biased outputs during startup and disables both HS and LS switches until the internal reference voltage exceeds the sensed FB voltage. This prevents reverse current flow and ensures monotonic, overshoot-free V_OUT ramp even when powered into an already-charged rail.

How is over-current protection implemented, and what triggers latch-off?

OCP uses valley-current sensing via the low-side MOSFET's R_DS(ON), tripping at ~8.5A. A single-cycle violation does not latch - only sustained OCP, OVP (>130% V_REF), UVP (<60% V_REF), or thermal shutdown causes latch-off. Recovery requires EN low pulse or VIN power cycle.