Monolithic Power Systems Inc. NB679AGD-P
- Part No.:
- NB679AGD-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 12-PowerVFQFN
- Datasheet:
-
NB679AGD-P.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 12QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NB679AGD-P from Monolithic Power Systems is a fully integrated synchronous buck converter with fixed 5.1V output, 8A continuous current capability, integrated 5V/100mA LDO, and LP#-controlled VOUT scaling (4.85V in low-power mode). It operates from 5.5V–24V input, uses adaptive constant-on-time control, and delivers high efficiency across load range in QFN-12 (2mm × 3mm) package - deployed in laptop power rails and tablet core voltage regulation.
For engineers reviewing the NB679AGD-P datasheet, NB679AGD-P pinout, NB679AGD-P application, or NB679AGD-P equivalent, key selection criteria include its dual-mode VOUT scaling (5.1V/4.85V), ultrasonic mode operation (EN-controlled), integrated LDO switchover logic, and adaptive COT transient response - all critical for portable system power architecture validation.
Technical Context
The NB679AGD-P implements adaptive constant-on-time (COT) control with DC auto-tune loop to maintain ±1% output regulation under line/load transients while enabling stable operation with ceramic or POSCAP output capacitors. Its valley-current OCP uses internal MOSFET RDS(on) sensing (12 mΩ LS-FET, 25 mΩ HS-FET) without external sense resistors.
Ultrasonic mode (USM) activates when EN is biased between 1.4V–1.8V, suppressing audible noise during light-load conditions by dynamically adjusting on-time; LP# logic directly scales VOUT between 5.1V (LP# = high) and 4.85V (LP# = low), enabling dynamic core voltage reduction in S3/S5 sleep states.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 5.5V to 24V - supports wide-range industrial and notebook adapter inputs without external pre-regulation. |
| Fixed Output Voltage | 5.1V ±2% - tightly regulated main rail for SoC I/O or DDR termination, with 1% reference accuracy. |
| Continuous Output Current | 8A - sufficient for CPU/GPU core power delivery in compact form factor designs. |
| Switching Frequency | 700 kHz - balances EMI performance and inductor size; supports ultrasonic mode below audible range. |
| Quiescent Current | 100 µA - enables ultra-low standby power in always-on system states. |
| LDO Output | 5V / 100mA - auxiliary rail for chipset or EC supply, with automatic switchover to VOUT above 4.8V. |
| Protection Features | OCP (10–12A valley limit), OVP (122% VREF), UVP-1 (75% VREF, 32µs timer), thermal shutdown (140°C). |
Pinout & Package
Package: QFN-12 (2mm × 3mm, 0.5mm pitch), thermally enhanced with exposed PGND pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VIN | Main power input | Supplies high-side switch and internal regulators; requires low-ESR ceramic input capacitor and wide PCB trace. |
| 2 PGND | Power ground return | High-current return path for SW and LDO; must connect to thermal pad and use multiple vias. |
| 3 PG | Open-drain power-good signal | Indicates VOUT within 95–105% of target; 750µs delay after regulation achieved. |
| 4 NC | No connection | Unbonded pin; must remain floating - no routing or soldering. |
| 5 VOUT | Output voltage sense & LDO switchover input | Kelvin-sense node for feedback; connects directly to output capacitor; triggers LDO switchover at >4.8V. |
| 6 LDO | Integrated 5V/100mA linear regulator output | Powers control circuitry; decoupled with ≥4.7µF X7R ceramic; switches to VOUT when PG is asserted. |
| 7 SW | Switch node | Drives external inductor; swings from -1V to VIN; requires minimal loop area and short, wide trace. |
| 8 BST | Bootstrap supply for high-side driver | Requires 0.1µF ceramic capacitor between BST and SW to sustain gate drive during HS-FET conduction. |
| 9 VCC | Internal 3.6V LDO output | Powers control logic; decoupled with ≥1µF X7R ceramic; independent of main VOUT rail. |
| 10 AGND | Analog ground reference | Kelvin connection to PGND required; separates noise-sensitive feedback paths from high-current returns. |
| 11 EN | Enable input with UVLO and mode control | 600kΩ internal pull-down; 1.3V threshold; selects USM (1.4–1.8V) or normal mode (2.6–3.6V). |
| 12 LP# | Low-power mode control | Active-low logic; sets VOUT = 4.85V when pulled low; open-circuit defaults to 5.1V operation. |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive COT control | Enables <10µs load transient response without external compensation components. |
| DC auto-tune loop | Corrects long-term DC error between FB and VREF, improving load regulation to ±0.5% over temperature. |
| Ultrasonic mode (USM) | Eliminates audible coil whine during light-load operation via EN-voltage-triggered frequency modulation. |
| Integrated LDO with switchover | Reduces quiescent loss by switching LDO supply from internal VCC to VOUT once regulation is established. |
| Output discharge function | Activates internal 6Ω discharge FET on shutdown to safely bleed VOUT to GND - prevents residual voltage hold-up. |
Applications
| Laptop Core Power Rail | Tablet SoC I/O Supply |
|---|---|
|
Use Scenario: Primary 5.1V power rail for Intel/AMD mobile processors and memory I/O interfaces in thin-and-light notebooks. IC Role / Device Role / Timing Role: Main synchronous buck regulator delivering 8A continuous current with fast transient response to CPU burst loads. Use Value: Adaptive COT control maintains <±15mV output deviation during 4A/µs load steps, ensuring stable SoC operation. |
Use Scenario: Fixed 5.1V supply for ARM-based application processors and display interface circuitry in 7–10 inch tablets. IC Role / Device Role / Timing Role: High-efficiency step-down converter supporting dynamic voltage scaling via LP# pin during suspend-to-RAM states. Use Value: LP#-enabled VOUT scaling to 4.85V reduces processor idle power by ~8% without firmware changes. |
| Networking System Management Rail | Distributed Power for Flat Panel Displays |
|
Use Scenario: Secondary 5.1V rail powering baseband controllers, PHYs, and fan controllers in enterprise routers and switches. IC Role / Device Role / Timing Role: Standalone buck converter with integrated LDO supplying clean 5V to management microcontrollers and sensors. Use Value: Built-in 100mA LDO eliminates need for discrete 5V LDO, reducing BOM count and board space by 25%. |
Use Scenario: Main 5.1V supply for timing controllers (TCON), LED drivers, and interface logic in LCD/LED TV backlights. IC Role / Device Role / Timing Role: High-reliability buck converter operating from 12–24V DC input with robust OVP/UVP protection. Use Value: 122% OVP threshold and 75% UVP-1 latch prevent display flicker or black screen during input brownouts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2451DT-LF-Z | Fixed 5V output, 0.6A max, no LDO, no LP# scaling, 2MHz switching. | Suitable only for low-power peripherals - lacks 8A capability and dual-VOUT scaling. | Select only for sub-1A auxiliary rails where size and cost outweigh performance requirements. |
| RT7290AZSP | Adjustable output (0.6–5.5V), 6A continuous, no integrated LDO, no ultrasonic mode. | Requires external feedback resistors and LDO; supports wider VOUT range but adds design complexity. | Prefer when programmable output or higher than 5.1V is needed; not drop-in for NB679AGD-P's LP#-scaling use case. |
Compared with MP2451DT-LF-Z and RT7290AZSP, the NB679AGD-P uniquely integrates 8A power delivery, LP#-controlled VOUT scaling, and a 100mA LDO in one QFN-12 package - eliminating three discrete components while enabling dynamic power state transitions in portable systems.
Availability
NB679AGD-P is available at Aetrix Electronics and suitable for laptop computers, tablet PCs, and flat panel display power systems requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for NB679AGD-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, headquartered in Kirkland, WA, with global design and support centers.
The NB679AGD-P belongs to MPS's NB-series high-current buck converters, designed specifically for space-constrained portable computing and display applications demanding integrated power management with low IQ and dynamic voltage scaling.
FAQ
What is the function of the LP# pin on NB679AGD-P?
The LP# pin is an active-low logic input that controls output voltage scaling: when pulled low, it reduces VOUT from 5.1V to 4.85V (−3% of nominal), enabling lower power consumption in S3/S5 sleep states. It is internally pulled high, so leaving it unconnected defaults to 5.1V operation. No external pull-up is required.
Does NB679AGD-P require external compensation components?
No. The NB679AGD-P uses adaptive constant-on-time (COT) control with internal compensation optimized for ceramic and POSCAP output capacitors. This eliminates the need for external RC networks or type-II/type-III compensation circuits, simplifying layout and reducing BOM count.
How does the integrated LDO operate and when does it switch over?
The NB679AGD-P includes a 5V/100mA LDO powered from VCC. Once VOUT reaches >4.8V and the PG signal asserts, an internal MOSFET switches the LDO input from VCC to VOUT - reducing dropout loss and improving system efficiency by up to 15% at light loads.
What protection features are built into NB679AGD-P?
It includes cycle-by-cycle over-current protection (valley-current sensing, 10–12A trip), over-voltage protection (122% VREF), two-stage under-voltage protection (UVP-1 at 75% VREF with 32µs timer; UVP-2 at 50% VREF), thermal shutdown (140°C with 25°C hysteresis), and input UVLO (4.7V rising threshold).
Can NB679AGD-P operate with ceramic output capacitors only?
Yes. Its DC auto-tune loop and adaptive COT architecture ensure stability with ceramic capacitors down to 10µF, eliminating the need for bulk electrolytic or tantalum capacitors. The datasheet confirms stable operation with X5R/X7R ceramics and recommends ≥22µF for optimal transient response.
What is the purpose of the PG (power-good) pin?
PG is an open-drain output indicating VOUT regulation status: it pulls low until VFB reaches 95% of VREF, then goes high after a 750µs delay. It falls low again if VFB drops below 85% of VREF - used for sequencing, fault reporting, or enabling downstream circuitry only when voltage is valid.
How is ultrasonic mode (USM) activated and what benefit does it provide?
USM activates automatically when EN voltage is held between 1.4V and 1.8V. It modulates switching frequency above 20kHz during light/no-load conditions to eliminate audible coil whine - critical for premium laptop and tablet acoustic performance without sacrificing efficiency.
NB679AGD-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 12-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 700kHz
- Voltage/Current - Output 1:
- 5.1V, 8A
- Voltage/Current - Output 2:
- 5V, 100mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 5.5V ~ 24V
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 12-QFN (2x3)
NB679AGD-P FAQ
1.How can I place an order for NB679AGD-P through Aetrix?
Please submit a Request for Quotation (RFQ) for NB679AGD-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NB679AGD-P reliable?
The price and inventory of NB679AGD-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NB679AGD-P is usually 5 days.
3.What payment methods are accepted for NB679AGD-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NB679AGD-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NB679AGD-P?
NB679AGD-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NB679AGD-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NB679AGD-P?
For technical support, including NB679AGD-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NB679AGD-P requirements.
6.How does Aetrix verify that NB679AGD-P is sourced from the original manufacturer or authorized distributors?
All NB679AGD-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NB679AGD-P meets industry standards.
7.What is the process for return or replacement of NB679AGD-P?
All NB679AGD-P units undergo pre-shipment inspection (PSI). If there is an issue with NB679AGD-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NB679AGD-P part is unused and in its original packaging.
Return procedure for NB679AGD-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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