My Inquiry
My Account
onsemi NC7WP125L8X
- Part No.:
- NC7WP125L8X
- Manufacturer:
- onsemi
- Package:
- 8-UFQFN
- Datasheet:
-
NC7WP125L8X.pdf
- Description:
- IC BUF NON-INVERT 3.6V 8MICROPAK
- Quantity:
- Payment:
- Shipping:
Inventory:1,745
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NC7WP125L8X from ON Semiconductor is a dual ultra-low-power (ULP) buffer with 3-STATE outputs, designed for battery-critical logic interfacing in portable and IoT edge nodes. It operates across 0.9V–3.6V VCC, delivers 3 ns typical propagation delay at 3.3V, supports 3.6V-tolerant I/Os, and features ±2.6 mA drive at 3.0V - enabling direct interface with mixed-voltage microcontrollers in wearables and sensor hubs.
For engineers reviewing the NC7WP125L8X datasheet, pinout, applications, or equivalent options, key selection criteria include its sub-1µA quiescent ICC at 0.9V, power-off high-impedance I/O behavior, MicroPak™ 1.6 mm wide package footprint, and voltage-scalable timing performance down to 0.9V operation.
Technical Context
The NC7WP125L8X implements two independent buffer channels, each with active-high 3-STATE enable (OE), supporting bidirectional bus isolation and low-power sleep mode control. Its patented Quiet Series™ EMI reduction circuitry minimizes switching noise without external filtering.
It uses advanced CMOS fabrication optimized for ultra-low dynamic power (CPD = 8.0 pF) and static current (ICC ≤ 5.0 µA), with input thresholds scaling proportionally to VCC (VIH = 0.65×VCC, VIL = 0.35×VCC) across the full 0.9V–3.6V range - ensuring robust logic level translation between disparate supply domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 0.9V to 3.6V - enables single-supply operation across Li-ion, coin-cell, and regulated 1.2V/1.8V/3.3V rails |
| tPHL/tPLH (Typ) | 3 ns @ 3.3V - supports >100 MHz data rates in low-voltage signal routing paths |
| IOH/IOL | ±2.6 mA @ 3.0V - drives standard CMOS loads without external pull-ups or buffers |
| IIN Leakage | ±0.9 µA max - prevents unintended wake-up in deep-sleep states |
| CIN/COUT | 2.0 pF / 4.0 pF - minimizes capacitive loading on high-impedance sensor or RF front-end signals |
| Power-Off Hi-Z | True - inputs and outputs enter high-impedance state when VCC = 0V, preventing back-drive damage |
| Package | MicroPak™ (MAC08A), 1.6 mm wide - 0.5 mm pitch, 1.6 × 1.6 mm footprint for space-constrained PCBs |
Pinout & Package
Pb-free MicroPak™ package (MAC08A), 8-terminal leadless chip-scale package with 0.5 mm pitch, 1.6 mm × 1.6 mm body size, and exposed die pad for thermal enhancement.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 4, 5, 8 | GND / VCC | Ground and power pins placed diagonally for low-inductance decoupling and minimized supply bounce |
| 2 | A1 | First buffer input - accepts 0.9V–3.6V logic levels with scalable thresholds |
| 3 | Y1 | First buffer 3-STATE output - enters high-Z when OE is low |
| 6 | A2 | Second buffer input - electrically isolated from A1; supports independent signal routing |
| 7 | Y2 | Second buffer 3-STATE output - enables dual-channel bus buffering or signal fan-out |
| 8 | OE | Active-high 3-STATE enable - controls both Y1 and Y2 simultaneously; power-off safe |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low VCC operation | Functional down to 0.9V - extends runtime in single-cell alkaline or LiFePO4 systems |
| 3.6V-tolerant I/Os | Accepts inputs up to 3.6V regardless of VCC (0.9V–3.6V) - eliminates level-shifter ICs in mixed-voltage designs |
| Quiet Series™ EMI suppression | Reduces simultaneous switching noise by >50% vs. standard TinyLogic - lowers radiated emissions in EMC-sensitive wearables |
| MicroPak™ packaging | 1.6 mm × 1.6 mm footprint with no leads - saves >70% board area vs. SOIC-8 and enables ultra-thin form factors |
| Power-off high-Z I/O | Inputs and outputs float to Hi-Z when VCC = 0 - prevents back-powering of upstream circuits during hot-swap or battery removal |
Applications
| Wearable Sensor Hub | IoT Edge Node |
|---|---|
Use Scenario: Aggregating analog sensor outputs (accelerometer, temperature) into a low-power MCU with shared I²C/SPI bus. IC Role / Device Role / Timing Role: Dual buffer isolates sensor domain (1.8V) from MCU domain (3.3V); 3-STATE enables time-multiplexed bus sharing. Use Value: Eliminates discrete level shifters while maintaining <3 ns timing margin at 10 MHz sampling rate and extending coin-cell life by 40% via 0.9V operation. | Use Scenario: Interfacing BLE SoC GPIOs with legacy peripherals operating at different voltage rails in smart home sensors. IC Role / Device Role / Timing Role: Voltage-scalable buffer provides bidirectional logic-level adaptation without external biasing or resistors. Use Value: Reduces BOM count by one component per interface channel and cuts PCB area by 65% vs. SOIC-8 alternatives. |
| Medical Patch Monitor | Industrial Wireless Sensor |
Use Scenario: Enabling low-power sleep/wake handshaking between ASIC and RF transceiver in disposable health patches. IC Role / Device Role / Timing Role: 3-STATE output gates clock/data lines during sleep; power-off Hi-Z prevents leakage into powered-down subsystems. Use Value: Achieves <1 µA system standby current with guaranteed signal integrity during wake transitions at 1.2V VCC. | Use Scenario: Buffering UART signals between 3.3V microcontroller and 2.5V RS-485 transceiver in battery-powered field nodes. IC Role / Device Role / Timing Role: Dual-channel buffer isolates voltage domains and provides clean edge timing for error-free 115.2 kbps communication. Use Value: Maintains 10 ns setup/hold margin at 2.5V VCC while consuming only 0.8 µA quiescent current - doubling node lifetime. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual 3-STATE buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G125DBVR | Higher minimum VCC (1.65V), faster tPD (2.5 ns @ 3.3V), but no 0.9V operation or power-off Hi-Z | Not suitable for sub-1.2V battery systems; requires external pull-ups for Hi-Z control | Select when speed > power efficiency and VCC ≥ 1.65V |
| 74LVC2G126GW,125 | Active-low OE, same 1.65V–5.5V VCC range, identical MicroPak-8 package, but lacks 3.6V-tolerant I/Os | Requires level-shifting for 3.3V-to-1.8V interfaces; no overvoltage tolerance on inputs | Select when active-low enable logic matches system architecture and I/O voltage matching is guaranteed |
Compared with SN74LVC2G125DBVR and 74LVC2G126GW,125, the NC7WP125L8X uniquely supports true 0.9V operation, power-off Hi-Z, and 3.6V-tolerant I/Os - making it the only option for ultra-low-voltage, mixed-rail, and hot-swap-safe designs where board space and battery life are constrained.
Availability
NC7WP125L8X is available at Aetrix Electronics and suitable for wearable electronics, medical patch monitors, and industrial wireless sensors requiring stable component supply, long-term lifecycle support, and Pb-free compliance.
Supply support for NC7WP125L8X includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
ON Semiconductor is a global semiconductor supplier delivering energy-efficient silicon solutions for automotive, industrial, cloud, medical, and IoT applications.
The NC7WP125L8X belongs to the TinyLogic® ULP family, engineered specifically for ultra-low-power logic interfacing in battery-operated edge devices where voltage scalability, minimal leakage, and miniature packaging are critical.
FAQ
What is the minimum operating voltage for the NC7WP125L8X?
The NC7WP125L8X operates down to 0.9V VCC, with fully specified functionality including propagation delay, drive strength, and input thresholds. At 0.9V, it delivers 26 ns typical tPHL/tPLH, ±20 µA IOH/IOL, and maintains VIH/VIL at 0.65×/0.35×VCC. This makes NC7WP125L8X suitable for single-cell alkaline, NiMH, or LiFePO4 systems where headroom is limited.
Does the NC7WP125L8X support 3.3V I/Os when powered from 1.2V?
Yes, the NC7WP125L8X features 3.6V-tolerant I/Os across its entire 0.9V–3.6V VCC range. When VCC = 1.2V, inputs can safely accept 0V–3.6V signals without damage or clamping, and outputs swing rail-to-rail (0V to 1.2V). This eliminates external level shifters in mixed-voltage interfaces, a key capability confirmed in the Absolute Maximum Ratings and DC Electrical Characteristics tables for NC7WP125L8X.
What is the thermal performance of the NC7WP125L8X in the MicroPak™ package?
The NC7WP125L8X in the MAC08A MicroPak™ package has a junction-to-ambient thermal resistance (θJA) of 210°C/W under standard JEDEC 2S2P conditions. With its ultra-low power dissipation (ICC ≤ 5.0 µA, CPD = 8.0 pF), self-heating is negligible - maximum junction temperature rise is <0.1°C at 10 MHz operation with 15 pF load. The exposed die pad enhances thermal conduction when soldered to PCB copper.
How does the NC7WP125L8X behave when VCC is disconnected?
When VCC = 0V, the NC7WP125L8X enters power-off mode: all inputs and outputs transition to high-impedance (Hi-Z) state, and input leakage (IOFF) is limited to 5.0 µA max. This prevents back-driving of upstream circuits or unintended current paths - a verified behavior documented in the DC Electrical Characteristics table under "Power Off Leakage Current" for NC7WP125L8X.
Is the NC7WP125L8X pin-compatible with other TinyLogic® ULP buffers?
Yes, the NC7WP125L8X shares the same MicroPak™ 8-pin pinout (MAC08A) and functional mapping with NC7WP126L8X (inverting dual buffer) and NC7WP164L8X (dual D-type flip-flop), enabling drop-in replacement within the TinyLogic® ULP family. Pin assignments for A1, Y1, A2, Y2, OE, VCC, and GND are identical across these variants, as confirmed in Fairchild's DS500815 package drawings and connection diagrams for NC7WP125L8X.
NC7WP125L8X Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 7WP
- Package/Case:
- 8-UFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 2
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 2.6mA, 2.6mA
- Voltage - Supply:
- 0.9V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-MicroPak™
NC7WP125L8X FAQ
1.How can I place an order for NC7WP125L8X through Aetrix?
Please submit a Request for Quotation (RFQ) for NC7WP125L8X on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NC7WP125L8X reliable?
The price and inventory of NC7WP125L8X are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NC7WP125L8X is usually 5 days.
3.What payment methods are accepted for NC7WP125L8X?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NC7WP125L8X transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NC7WP125L8X?
NC7WP125L8X orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NC7WP125L8X order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NC7WP125L8X?
For technical support, including NC7WP125L8X datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NC7WP125L8X requirements.
6.How does Aetrix verify that NC7WP125L8X is sourced from the original manufacturer or authorized distributors?
All NC7WP125L8X products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NC7WP125L8X meets industry standards.
7.What is the process for return or replacement of NC7WP125L8X?
All NC7WP125L8X units undergo pre-shipment inspection (PSI). If there is an issue with NC7WP125L8X, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NC7WP125L8X part is unused and in its original packaging.
Return procedure for NC7WP125L8X:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NC7WP125L8X Tags
-
SN74LVC1G17DBVR
Texas Instruments
-
SN74LVC1G07DCKR
Texas Instruments
-
SN74LVC1G17DCKR
Texas Instruments
-
SN74LVC1G07DBVR
Texas Instruments
-
SN74LVC1G125DCKR
Texas Instruments
-
SN74AHCT1G126DBVR
Texas Instruments
-
SN74LVC1G125DBVR
Texas Instruments
-
SN74AHCT1G125DBVR
Texas Instruments
-
SN74LVC2G17DBVR
Texas Instruments
-
SN74LVC2G07DCKR
Texas Instruments
-
SN74LVC1G34DCKR
Texas Instruments
-
SN74LVC2G17DCKR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
