onsemi NCP114AMX210TCG
- Part No.:
- NCP114AMX210TCG
- Manufacturer:
- onsemi
- Package:
- 4-UDFN Exposed Pad
- Datasheet:
-
NCP114AMX210TCG.pdf
- Description:
- IC REG LINEAR 2.1V 300MA 4UDFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,647
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NCP114AMX210TCG from onsemi is a 300 mA CMOS low-dropout linear regulator with fixed 2.1 V output, 135 mV typical dropout at 300 mA, ±1% output accuracy, and active output discharge function-designed for noise-sensitive portable applications including smartphones and Bluetooth modules where stable low-noise power delivery under light-load conditions is critical.
For engineers reviewing the NCP114AMX210TCG datasheet, pinout, applications, or equivalent options, key selection factors include its 50 µA typical quiescent current, 75 dB PSRR at 1 kHz, UDFN4 1×1 mm package with exposed pad, thermal shutdown and current limit protection, and compatibility with 1 µF ceramic output capacitors.
Technical Context
The NCP114AMX210TCG employs a PMOS pass transistor architecture enabling ultra-low quiescent current via dynamic IQ adjustment, and integrates an active discharge MOSFET (100 Ω typical) activated during shutdown to rapidly discharge the output capacitor. Its bandgap reference and error amplifier deliver ±1% output voltage accuracy across −40°C to +85°C.
Designed for battery-powered systems, it operates from 1.7 V to 5.5 V input, supports 2.1 V fixed output, and maintains stability with minimal 1 µF X5R/X7R ceramic output capacitance-no ESR requirement-while providing 75 dB power supply ripple rejection at 1 kHz and 70 µVRMS output noise (10 Hz–100 kHz).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 2.1 V ±1% at room temperature; ensures precise biasing for 2.1 V I/O domains or core logic without external feedback. |
| Max Output Current | 300 mA continuous; sufficient for powering RF transceivers, sensor interfaces, or microcontroller cores in compact portable devices. |
| Dropout Voltage | 140–210 mV at 300 mA (typ. 140 mV @ VOUT = 2.1 V); enables regulation down to VIN = 2.24 V, extending battery runtime in single-cell Li-ion systems. |
| Quiescent Current | Typ. 50 µA at no load; minimizes standby power loss in always-on subsystems such as real-time clocks or wake-up controllers. |
| PSRR | 75 dB at 1 kHz; suppresses switching noise from adjacent DC-DC converters, critical for ADC references and RF front-end power rails. |
| Output Noise | 70 µVRMS (10 Hz–100 kHz); low enough for powering sensitive analog circuits like PLLs or audio codecs without additional filtering. |
| Enable Threshold | VEN_HI = 0.9 V, VEN_LO = 0.4 V; compatible with 1.8 V and 3.3 V GPIOs for clean digital control of power sequencing. |
Pinout & Package
Package: UDFN4 (1.0 mm × 1.0 mm, 0.65 mm pitch), Pb-free, with exposed thermal pad (EPAD) requiring direct connection to GND for optimal thermal performance (RJA = 170°C/W on 1 oz FR4 with 645 mm² copper area).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IN) | Input voltage supply | Accepts 1.7–5.5 V; requires ≥1 µF ceramic decoupling capacitor placed adjacent to pin to suppress high-frequency noise and transient currents. |
| 2 (GND) | Power ground reference | Common return path for input/output currents; EPAD must be soldered to large GND copper plane for thermal dissipation and low-impedance grounding. |
| 3 (EN) | Enable control input | Active-high logic input; drives >0.9 V to enable regulator, <0.4 V to disable and activate 100 Ω output discharge path to GND. |
| 4 (OUT) | Regulated output | Delivers stable 2.1 V; requires ≥1 µF ceramic capacitor to GND for loop stability; supports fast load transients up to 300 mA. |
Key Features
| Feature | Design Value |
|---|---|
| Active output discharge | Integrated 100 Ω discharge FET activated during shutdown (EN < 0.4 V), reducing VOUT decay time and preventing floating outputs in multi-rail systems. |
| Ultra-low IQ operation | Dynamic quiescent current adjustment yields typ. 50 µA at no load and increases only modestly under load-critical for battery longevity in IoT endpoints. |
| Stable with 1 µF ceramic COUT | No ESR requirement; eliminates need for tantalum or polymer capacitors, reducing BOM cost and board space while improving reliability. |
| Full protection suite | Thermal shutdown (160°C trip, 20°C hysteresis), current limit (600 mA typ.), and short-circuit immunity ensure robust operation in uncontrolled environments. |
| High PSRR & low noise | 75 dB PSRR at 1 kHz and 70 µVRMS broadband noise enable direct powering of noise-sensitive analog blocks without post-regulation filtering. |
Applications
| Smartphone Baseband Power | Bluetooth LE Audio Module |
|---|---|
Use Scenario: Supplying 2.1 V to baseband processor I/O banks during deep-sleep mode with burst transmission. IC Role / Device Role / Timing Role: Low-noise, low-IQ LDO delivering regulated 2.1 V rail with fast transient response to handle RF transmit current spikes. Use Value: Extends battery life via 50 µA quiescent current and maintains signal integrity with 75 dB PSRR against PMIC switching noise. | Use Scenario: Powering Bluetooth 5.0 LE audio codec and DSP in true wireless stereo earbuds. IC Role / Device Role / Timing Role: Fixed 2.1 V output LDO with active discharge ensuring rapid rail collapse between audio packet bursts. Use Value: Enables deterministic power sequencing and prevents latch-up in multi-voltage SoC interfaces during sleep/wake transitions. |
| Portable Medical Sensor Hub | Wearable Fitness Tracker |
Use Scenario: Regulating power for optical heart-rate sensor (PPG) and ADC front-end in wrist-worn health monitors. IC Role / Device Role / Timing Role: Ultra-low-noise (70 µVRMS) 2.1 V supply isolating analog signal chain from digital noise sources. Use Value: Improves PPG signal-to-noise ratio by minimizing LDO-induced noise floor elevation in sub-100 nA photodiode current measurements. | Use Scenario: Supplying 2.1 V to motion sensor fusion engine (accelerometer + gyroscope) during activity tracking. IC Role / Device Role / Timing Role: High PSRR LDO rejecting noise from display backlight drivers and wireless charging receivers. Use Value: Prevents false motion detection events caused by power rail coupling, improving algorithm accuracy and user experience. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS7A0521PDBVR | 200 mA max output, 25 µA IQ, no active discharge, SOT-23-5 package (larger footprint, higher RJA). | Suitable for lower-current sensor nodes but lacks discharge function needed for strict power sequencing. | Select when ultra-low IQ dominates over output current and discharge requirements. |
| MCP1826T-2.102E/DB | 500 mA output, 90 µA IQ, no active discharge, 6-pin SOT-23 package with bypass pin. | Better current capability but higher quiescent current and no integrated discharge path. | Prefer when higher load current is required and external discharge circuitry can be added. |
Compared with TPS7A0521PDBVR and MCP1826T-2.102E/DB, the NCP114AMX210TCG uniquely combines 300 mA output, 50 µA IQ, and integrated active discharge in a 1×1 mm UDFN4 package-enabling smaller footprints, longer battery life, and simplified power sequencing in space-constrained portable designs.
Availability
NCP114AMX210TCG is available at Aetrix Electronics and suitable for smartphone baseband power, Bluetooth LE audio modules, and portable medical sensor hubs requiring stable component supply with guaranteed long-term manufacturability and consistent parametric performance.
Supply support for NCP114AMX210TCG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier delivering energy-efficient silicon solutions for automotive, industrial, cloud, medical, and edge applications.
The NCP114 product line targets ultra-low-power, noise-sensitive portable electronics-designed specifically for battery-operated devices needing high PSRR, sub-100 µA quiescent current, and compact packaging without sacrificing protection or stability.
FAQ
What is the output voltage tolerance of the NCP114AMX210TCG over temperature?
The NCP114AMX210TCG provides ±1% output voltage accuracy at room temperature. Over the full operating junction temperature range (−40°C to +85°C), the output voltage deviation remains within ±2% for VOUT > 2.0 V per the datasheet's Electrical Characteristics table-ensuring reliable operation in consumer and industrial portable environments without external trimming.
Does the NCP114AMX210TCG require an external resistor network to set the output voltage?
No, the NCP114AMX210TCG is a fixed-output LDO with factory-trimmed 2.1 V regulation. It contains an internal precision bandgap reference and feedback divider, eliminating the need for external resistors. This simplifies layout, reduces component count, and improves long-term stability compared to adjustable LDOs.
Can the NCP114AMX210TCG operate with a 1.8 V input supply?
No-the minimum input voltage for the NCP114AMX210TCG is 1.7 V, but with a 2.1 V output and typical dropout of 140 mV at 300 mA, the absolute minimum functional input is ~2.24 V. At 1.8 V input, the device enters dropout and cannot regulate; it will either shut down or deliver unregulated, degraded output depending on load and temperature.
Is the active output discharge feature present in all NCP114 variants?
No-the active output discharge function is exclusive to "A" suffix versions like the NCP114AMX210TCG. "B" suffix variants (e.g., NCP114BMX210TCG) omit this feature. The datasheet explicitly states that active discharge is present *only* in NCP114AMXyyyTCG devices, with RDIS = 100 Ω typical when EN < 0.4 V.
What is the recommended PCB layout practice for thermal management of the NCP114AMX210TCG?
For optimal thermal performance, the exposed pad (EPAD) of the NCP114AMX210TCG must be soldered directly to a large GND copper plane using ≥4 thermal vias (0.3 mm diameter) spaced evenly beneath the pad. The datasheet specifies RJA = 170°C/W on 1 oz FR4 with 645 mm² copper area-reducing copper area or omitting vias significantly degrades thermal resistance and risks thermal shutdown under sustained 300 mA loads.
NCP114AMX210TCG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 4-UDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 2.1V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- -
- Current - Output:
- 300mA
- Current - Quiescent (Iq):
- 95 µA
- Current - Supply (Max):
- -
- PSRR:
- 75dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 4-UDFN (1.0x1.0)
NCP114AMX210TCG FAQ
1.How can I place an order for NCP114AMX210TCG through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP114AMX210TCG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP114AMX210TCG reliable?
The price and inventory of NCP114AMX210TCG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP114AMX210TCG is usually 5 days.
3.What payment methods are accepted for NCP114AMX210TCG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP114AMX210TCG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP114AMX210TCG?
NCP114AMX210TCG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP114AMX210TCG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP114AMX210TCG?
For technical support, including NCP114AMX210TCG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP114AMX210TCG requirements.
6.How does Aetrix verify that NCP114AMX210TCG is sourced from the original manufacturer or authorized distributors?
All NCP114AMX210TCG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP114AMX210TCG meets industry standards.
7.What is the process for return or replacement of NCP114AMX210TCG?
All NCP114AMX210TCG units undergo pre-shipment inspection (PSI). If there is an issue with NCP114AMX210TCG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP114AMX210TCG part is unused and in its original packaging.
Return procedure for NCP114AMX210TCG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NCP114AMX210TCG Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

