onsemi NCP115CMX330TBG
- Part No.:
- NCP115CMX330TBG
- Manufacturer:
- onsemi
- Package:
- 4-XDFN Exposed Pad
- Datasheet:
-
NCP115CMX330TBG.pdf
- Description:
- IC REG LINEAR 3.3V 300MA 4XDFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,856
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Product details
Overview
NCP115CMX330TBG from onsemi is a 300 mA, 3.3 V fixed-output low-dropout linear regulator in XDFN4 package, featuring ±1% output accuracy, 250 mV typical dropout at 300 mA (2.8 V input), 70 dB PSRR at 1 kHz, and active output discharge - designed for noise-sensitive battery-powered systems including smartphones and portable medical devices.
For engineers reviewing the NCP115CMX330TBG datasheet, pinout, applications, or equivalent options, key selection criteria include its slow slew-rate (20 mV/s) for camera sensor power sequencing, ultra-low 50 µA quiescent current, thermal shutdown at 160°C, and stability with only 1 µF ceramic output capacitor.
Technical Context
The NCP115CMX330TBG implements a PMOS pass transistor architecture enabling low dropout and inherent reverse-current protection. Its internal bandgap reference and error amplifier deliver tight regulation across −40°C to +85°C, while the dedicated EN pin controls both enable/disable and active discharge via a 100 Ω pull-down path.
This variant belongs to the "C" version family, confirming slow VOUT slew rate (20 mV/s typ.) and integrated active discharge - distinct from "A/B" normal-slew variants. It operates within 1.7 V–5.5 V input range and maintains stability without ESR requirements on the 1 µF output capacitor.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 3.3 V ±1% at room temperature - ensures reliable biasing of 3.3 V I/O domains without external feedback. |
| Max Output Current | 300 mA continuous - supports moderate-power subsystems like RF transceivers or sensor hubs. |
| Dropout Voltage | 250 mV typical at 300 mA (VIN = 2.8 V) - enables operation from single-cell Li-ion (2.8 V min) with headroom. |
| Quiescent Current | 50 µA typical at no load - extends battery life in always-on standby modes. |
| PSRR | 70 dB at 1 kHz - suppresses switching noise from adjacent DC-DC converters feeding the LDO input. |
| Output Noise | 104 µVRMS (10 Hz–100 kHz, 3.3 V out) - suitable for analog/RF circuitry requiring clean supply rails. |
| Enable Threshold | VEN_HI = 0.9 V, VEN_LO = 0.4 V - compatible with standard GPIO logic levels for host-controlled power gating. |
Pinout & Package
XDFN4 (Case 711AJ), 1.0 mm × 1.0 mm, 0.65 mm pitch, exposed thermal pad (EPAD) - optimized for space-constrained PCB layouts and thermal performance on 1 oz FR-4 with ≥645 mm² ground copper.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IN) | Input voltage supply | Accepts 1.7–5.5 V; requires local 1 µF ceramic decoupling to minimize trace inductance effects during load transients. |
| 2 (GND) | Power ground reference | Primary return path; EPAD must be soldered directly to this node for thermal and electrical integrity. |
| 3 (EN) | Enable control input | Active-high logic: >0.9 V enables regulation; <0.4 V disables and activates 100 Ω output discharge to GND. |
| 4 (OUT) | Regulated output | Delivers stable 3.3 V; requires 1 µF ceramic capacitor to GND for stability - no ESR requirement. |
Key Features
| Feature | Design Value |
|---|---|
| Slow VOUT slew rate | 20 mV/s typical - prevents inrush current and voltage overshoot during power-up of sensitive image sensors. |
| Active output discharge | 100 Ω internal MOSFET path to GND when disabled - ensures rapid, controlled VOUT decay for system-level sequencing. |
| Ultra-low IQ | 50 µA typical at zero load - reduces standby power loss in IoT edge nodes with long sleep intervals. |
| Thermal shutdown | 160°C trip with 20°C hysteresis - protects against sustained overload or poor heatsinking without latch-up. |
| High PSRR | 70 dB @ 1 kHz, >50 dB up to 100 kHz - maintains signal integrity in mixed-signal SoC power domains. |
Applications
| Smartphone Baseband Power | Portable Medical Sensor Bias |
|---|---|
Use Scenario: Powering 3.3 V analog front-end (AFE) and ADC in handheld ECG monitor. IC Role / Device Role / Timing Role: Primary LDO delivering clean, sequenced 3.3 V rail with controlled ramp-up to avoid sensor saturation during wake-up. Use Value: Slow slew rate (20 mV/s) eliminates transient-induced baseline shift; 104 µVRMS noise ensures sub-16-bit measurement fidelity. |
Use Scenario: Supplying 3.3 V to Bluetooth Low Energy (BLE) radio and microcontroller in wearable patch. IC Role / Device Role / Timing Role: Always-on LDO maintaining regulated rail during deep-sleep cycles, enabled only during BLE advertising bursts. Use Value: 50 µA quiescent current extends coin-cell battery life beyond 12 months; active discharge clears residual charge before MCU reset. |
| Camera Module Sequencing | Industrial Handheld Terminal |
Use Scenario: Powering CMOS image sensor with strict voltage ramp requirements in smartphone rear camera module. IC Role / Device Role / Timing Role: Dedicated slow-ramp LDO ensuring VOUT reaches 3.3 V within 165 seconds (3.3 V / 20 mV/s) to meet sensor initialization timing. Use Value: Prevents mechanical shutter jitter and pixel corruption caused by fast VOUT transitions; 1.0 mm × 1.0 mm XDFN4 fits under lens barrel. |
Use Scenario: Regulating 3.3 V for barcode scanner ASIC and touch controller in ruggedized logistics terminal. IC Role / Device Role / Timing Role: Input-supervised LDO operating from wide-range 2.8–5.5 V battery pack, surviving cold-cranking dips. Use Value: 250 mV dropout at 300 mA allows uninterrupted operation down to 3.55 V battery voltage; thermal shutdown prevents field failure in sealed enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NCP115AMX330TBG | Same 3.3 V output, XDFN4 package, but "A" version with normal slew rate (190 mV/s) and no active discharge. | Lacks controlled VOUT ramp and output discharge - unsuitable for camera sensors or systems requiring fast VOUT decay. | Select only if fast turn-on and no discharge are acceptable; verify downstream circuit tolerance to inrush. |
| MCP1826T-3302E/DB | 3.3 V, 500 mA, SOT-23-5; 210 mV dropout at 500 mA; 80 µA IQ; no active discharge; 65 dB PSRR @ 1 kHz. | Higher current capability but larger footprint and higher noise (120 µVRMS); no slew-rate control or discharge function. | Prefer when >300 mA load or SOT-23 layout compatibility is required; not drop-in due to pinout and feature mismatch. |
Compared with NCP115AMX330TBG, the NCP115CMX330TBG adds critical slow-ramp and active discharge for imaging/sensor sequencing, while MCP1826T-3302E/DB trades those features for higher current and different package - making NCP115CMX330TBG uniquely suited for compact, noise-sensitive, sequenced power delivery.
Availability
NCP115CMX330TBG is available at Aetrix Electronics and suitable for smartphone baseband power, portable medical sensor bias, camera module sequencing, and industrial handheld terminals requiring stable component supply with full lifecycle support.
Supply support for NCP115CMX330TBG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient silicon solutions for automotive, industrial, cloud, and medical applications.
The NCP115 series was developed specifically for ultra-low-power, high-PSRR LDO applications in space-constrained portable electronics - emphasizing dynamic IQ optimization, robust protection, and seamless integration with battery-powered SoCs.
FAQ
What is the output voltage tolerance of the NCP115CMX330TBG over temperature?
The NCP115CMX330TBG maintains ±1% output voltage accuracy at room temperature. Over the full operating junction temperature range (−40°C to +85°C), the output deviation is specified as ±2% for VOUT > 2.0 V - confirmed in the Electrical Characteristics table on page 3 of the datasheet. This ensures reliable 3.3 V rail stability across environmental conditions encountered in handheld devices.
Does the NCP115CMX330TBG support active output discharge, and how does it work?
Yes, the NCP115CMX330TBG includes active output discharge. When the EN pin voltage drops below 0.4 V, the internal 100 Ω discharge MOSFET connects the OUT pin to GND, rapidly pulling VOUT to ground. This feature is confirmed in the datasheet's PIN FUNCTION DESCRIPTION (page 2) and Figure 2 block diagram, and is exclusive to "C" and "A" variants - critical for safe power sequencing in multi-rail systems.
What is the maximum input voltage the NCP115CMX330TBG can tolerate?
The NCP115CMX330TBG has an absolute maximum input voltage rating of 6 V, as stated in the Absolute Maximum Ratings table (page 2). However, its operational input voltage range is 1.7 V to 5.5 V - meaning sustained operation above 5.5 V risks permanent damage, and design margins should keep VIN ≤ 5.5 V under all conditions, including ripple and transients.
Can the NCP115CMX330TBG operate stably with less than 1 µF output capacitance?
No - the NCP115CMX330TBG is specified to be stable with a minimum 1 µF ceramic output capacitor (X5R/X7R dielectric), as stated in the Features list (page 1) and Applications Information (page 12). The datasheet notes that stability is guaranteed down to 0.47 µF *only* to account for capacitance loss due to DC bias, temperature, and package size - not as a design target. Using <1 µF risks oscillation or poor transient response.
How does the slow slew rate of the NCP115CMX330TBG benefit camera sensor applications?
The NCP115CMX330TBG's slow slew rate (20 mV/s typical) limits dV/dt during power-up, preventing inrush current spikes and voltage overshoot that could saturate CMOS image sensor pixels or trigger false resets. As confirmed in Figure 30 and the Applications Information section (page 14), this controlled ramp is essential for meeting camera module initialization timing and avoiding image artifacts - a key differentiator from faster-slew LDOs like the "A" variant.
NCP115CMX330TBG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 4-XDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 3.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.28V @ 300mA
- Current - Output:
- 300mA
- Current - Quiescent (Iq):
- 95 µA
- Current - Supply (Max):
- -
- PSRR:
- 70dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 85°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 4-XDFN (1x1)
NCP115CMX330TBG FAQ
1.How can I place an order for NCP115CMX330TBG through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP115CMX330TBG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP115CMX330TBG reliable?
The price and inventory of NCP115CMX330TBG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP115CMX330TBG is usually 5 days.
3.What payment methods are accepted for NCP115CMX330TBG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP115CMX330TBG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP115CMX330TBG?
NCP115CMX330TBG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP115CMX330TBG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP115CMX330TBG?
For technical support, including NCP115CMX330TBG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP115CMX330TBG requirements.
6.How does Aetrix verify that NCP115CMX330TBG is sourced from the original manufacturer or authorized distributors?
All NCP115CMX330TBG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP115CMX330TBG meets industry standards.
7.What is the process for return or replacement of NCP115CMX330TBG?
All NCP115CMX330TBG units undergo pre-shipment inspection (PSI). If there is an issue with NCP115CMX330TBG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP115CMX330TBG part is unused and in its original packaging.
Return procedure for NCP115CMX330TBG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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