onsemi NCP120AMX180TCG

Overview

NCP120AMX180TCG from onsemi is a 150 mA very low dropout (VLDO) CMOS voltage regulator with NMOS pass transistor and separate VBIAS supply, delivering a fixed 1.80 V output. It achieves ±1.5% accuracy over −40°C to +85°C, 75 mV max dropout at 150 mA, and ultra-low bias current (80 µA typ), optimized for noise-sensitive, space-constrained portable electronics such as smartphone I/O rails and camera sensor power domains.

For engineers reviewing the NCP120AMX180TCG datasheet, pinout, applications, or equivalent options, key selection criteria include its dual-rail architecture (VIN/VBIAS), active output discharge capability, XDFN6 1.2 mm × 1.2 mm package, and PSRR of 70 dB (VIN-to-VOUT) and 80 dB (VBIAS-to-VOUT) at 1 kHz - critical for low-noise post-regulation in battery-powered systems.

Technical Context

The NCP120AMX180TCG implements a dual-input NMOS-based VLDO architecture: VIN supplies the pass element while VBIAS powers internal control circuitry, enabling stable regulation even when VIN approaches VOUT. Its under-voltage lockout (UVLO) on VBIAS features 1.6 V threshold with 0.2 V hysteresis, ensuring reliable startup and shutdown sequencing.

It integrates thermal shutdown (160°C trip, 140°C release), current limiting (200–600 mA), and logic-level enable (VEN(H) = 0.9 V) with monotonic start-up to limit inrush. The active output discharge function - present only in "A"-suffix variants like NCP120AMX180TCG - pulls VOUT to GND when disabled, preventing floating outputs in multi-rail systems.

Key Specifications

Pinout & Package

The NCP120AMX180TCG is housed in an XDFN6 package (Case 711AT), 1.2 mm × 1.2 mm × 0.4 mm, with exposed thermal pad soldered to GND for enhanced thermal performance (R_JA = 170°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-noise, dual-rail LDO applications.

Compared with TPS7A2018PDQNR and NCP114AMX180TCG, the NCP120AMX180TCG uniquely combines dual-rail noise isolation, active output discharge, and ultra-low 40 µV_RMS noise in a 1.2 mm × 1.2 mm footprint - making it optimal for space-constrained, multi-rail portable systems demanding precise power sequencing and low-noise analog performance.

Availability

NCP120AMX180TCG is available at Aetrix Electronics and suitable for smartphone I/O regulation, camera sensor power, STB memory interface, and portable DVR audio bias applications requiring stable component supply, consistent marking (L, 180° rotation), and RoHS-compliant XDFN6 packaging.

Supply support for NCP120AMX180TCG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient electronics, delivering silicon solutions for automotive, industrial, cloud, and intelligent edge applications.

The NCP120 series is designed specifically for dual-rail, low-noise post-regulation in battery-powered portable devices - emphasizing ultra-low dropout, bias-supply independence, and active discharge for robust power sequencing.

FAQ

What is the nominal output voltage of the NCP120AMX180TCG?

The NCP120AMX180TCG delivers a fixed 1.80 V output voltage, verified across −40°C to +85°C with ±1.5% accuracy. This value is laser-trimmed during manufacturing and marked as "L" on the top-side package. The 1.80 V output is intended for I/O rails, sensor interfaces, and other 1.8 V logic domains where tight regulation and low noise are essential.

Does the NCP120AMX180TCG support active output discharge, and how does it function?

Yes, the NCP120AMX180TCG includes integrated active output discharge. When the EN pin is driven low (≤0.4 V), an internal 150 Ω pull-down connects OUT to GND, discharging the output capacitor rapidly. This feature is exclusive to "A"-suffix variants (like NCP120AMX180TCG) and prevents floating voltages that could cause latch-up or false wake-up in multi-rail SoC systems.

What are the minimum required input and bias voltages for stable operation of the NCP120AMX180TCG?

For stable operation, the NCP120AMX180TCG requires VIN ≥ VOUT + VDO (≥1.875 V at 150 mA) and VBIAS ≥ (VOUT + 1.35 V) = 3.15 V, with absolute minimums of 0.8 V for VIN and 2.4 V for VBIAS. The VBIAS UVLO threshold is 1.6 V with 0.2 V hysteresis, so VBIAS must exceed 1.8 V to ensure reliable startup - though full specification compliance requires ≥3.15 V.

Can the NCP120AMX180TCG operate with a 1 µF ceramic output capacitor, and why is effective capacitance emphasized?

Yes, the NCP120AMX180TCG is stable with a 1 µF ceramic output capacitor - but only if its effective capacitance (accounting for DC bias, temperature, and tolerance derating) remains ≥1 µF. For example, a 2.2 µF 0402 X5R capacitor may drop to <1 µF at 1.8 V bias and −40°C; thus, the datasheet specifies "effective" capacitance to ensure loop stability across real-world conditions.

How does the dual-rail architecture (VIN + VBIAS) of the NCP120AMX180TCG improve noise performance compared to single-rail LDOs?

The dual-rail architecture isolates noise-sensitive control circuitry (powered by VBIAS) from the high-current VIN path. This enables 80 dB PSRR from VBIAS to VOUT - significantly higher than typical single-rail LDOs - and reduces coupling of switching noise from upstream DC/DC converters into the regulated output, which is critical for analog sensor and RF subsystems powered by the NCP120AMX180TCG.