onsemi NCP121AMX185TCG
- Part No.:
- NCP121AMX185TCG
- Manufacturer:
- onsemi
- Package:
- 6-XFDFN Exposed Pad
- Datasheet:
-
NCP121AMX185TCG.pdf
- Description:
- IC REG LINEAR 1.85V 150MA 6XDFN
- Quantity:
- Payment:

- Shipping:

Inventory:57,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NCP121AMX185TCG from onsemi is a fixed-output, high-accuracy, very low dropout (VLDO) linear voltage regulator with NMOS pass transistor and dual-rail operation (VIN and VBIAS). It delivers 150 mA at 1.85 V output with ±1.0% accuracy over line/load/temperature, 75 mV max dropout at full load, and ultra-low bias current (80 µA typ), optimized for noise-sensitive, space-constrained portable applications such as smartphone core logic rails.
For engineers reviewing the NCP121AMX185TCG datasheet, pinout, applications, or equivalent options, key selection criteria include its dual-supply architecture (VIN + VBIAS), active output discharge capability, XDFN6 1.2 mm × 1.2 mm package, and guaranteed stability with 1 µF ceramic output capacitor - all critical for battery-powered SoC post-regulation and low-noise I/O supply design.
Technical Context
The NCP121AMX185TCG implements an NMOS pass transistor topology powered by separate VIN and VBIAS supplies, enabling ultra-low dropout (37 mV typ at 150 mA) and reduced sensitivity to output capacitor ESR compared to PMOS LDOs. Its internal reference and error amplifier are biased from VBIAS, decoupling control circuit performance from input rail fluctuations.
It features logic-level enable (VEN(H) = 0.9 V), thermal shutdown (160°C trip), current limiting (200–600 mA), and - uniquely in the "A" variant - active output discharge (RDISCH = 150 Ω) during disable. The device operates across −40°C to +85°C with PSRR of 70 dB (VIN→VOUT) and 80 dB (VBIAS→VOUT) at 1 kHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.85 V - eliminates external feedback network; supports precise core voltage for ARM Cortex-A/M series processors. |
| Accuracy | ±1.0% over line/load/temperature - ensures stable operation under battery discharge, load transients, and ambient variation. |
| Max Dropout | 75 mV at 150 mA - enables regulation from 1.925 V input, critical for single-cell Li-ion (2.6–4.2 V) post-regulation into narrow VDD windows. |
| Bias Current | 80 µA typ at 2.7 V VBIAS - minimizes auxiliary rail loading in multi-rail power architectures. |
| PSRR @ 1 kHz | 80 dB (VBIAS→VOUT) - suppresses noise coupling from shared bias rails, essential for analog/RF subsystems. |
| Stability | Guaranteed with 1 µF ceramic COUT - reduces BOM count and PCB area vs. larger tantalum or multi-capacitor solutions. |
| Enable Threshold | VEN(H) = 0.9 V - compatible with 1.2 V or 1.8 V GPIO without level-shifting. |
Pinout & Package
XDFN6 package (Case 711AT): 1.2 mm × 1.2 mm × 0.4 mm, thermally enhanced with exposed thermal pad soldered to GND plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - OUT | Regulated output | Delivers stable 1.85 V; connects directly to load with minimal trace inductance for low-noise operation. |
| 2 - N/C | No internal connection | Must remain unconnected; no routing or stitching required. |
| 3 - EN | Logic-enable control | Active-high input; internal hysteresis prevents chatter during slow-rising control signals. |
| 4 - BIAS | Bias supply rail | Powers internal reference and control circuits; requires ≥2.4 V and low-impedance decoupling (0.1 µF min). |
| 5 - GND | Power ground | Common return for IN, OUT, BIAS, and EN; must be tied to thermal pad for optimal thermal performance. |
| 6 - IN | Main input supply | Accepts 0.8–5.5 V; dropout defined relative to OUT; requires 1 µF ceramic input capacitor. |
Key Features
| Feature | Design Value |
|---|---|
| Active Output Discharge | 150 Ω pull-down (NCP121A variant only) - ensures rapid VOUT discharge during shutdown, preventing floating states in sequenced power systems. |
| Dual-Rail Architecture | Independent VIN and VBIAS inputs - isolates regulation loop stability from bias rail noise and allows optimization of each supply path. |
| Ultra-Low Noise | 40 µVRMS (10 Hz–100 kHz) - meets stringent noise requirements for RF transceivers and high-speed ADC/DAC reference supplies. |
| Thermal Protection | 160°C shutdown / 140°C recovery - provides autonomous fault recovery without system-level intervention in compact enclosures. |
| Pb-Free & RoHS | Halogen-free/BFR-free construction - compliant with IPC-J-STD-020 moisture sensitivity level 1 (MSL1) for standard reflow. |
Applications
| Smartphone Application Processor Core Rail | Tablet GPU I/O Supply |
|---|---|
Use Scenario: Regulating clean 1.85 V for ARM Cortex-A78 CPU cluster cores during dynamic frequency scaling. IC Role / Device Role / Timing Role: Post-regulator supplying final core voltage after primary buck converter; handles fast load transients up to 150 mA. Use Value: ±1.0% accuracy maintains timing margin across P-state transitions; 75 mV dropout extends usable battery range down to 1.925 V input. |
Use Scenario: Powering MIPI D-PHY transmitter I/O banks in high-resolution tablet displays. IC Role / Device Role / Timing Role: Low-noise, low-ESR LDO delivering stable 1.85 V to high-speed interface buffers. Use Value: 40 µVRMS output noise prevents bit errors in 2.5 Gbps differential signaling; 1 µF ceramic stability simplifies layout near display driver IC. |
| Wireless Camera Sensor Interface | STB HDMI Transmitter Core Supply |
Use Scenario: Providing regulated 1.85 V to CMOS image sensor digital backend and ISP logic in compact security cameras. IC Role / Device Role / Timing Role: Primary low-quiescent LDO for noise-sensitive imaging pipeline; enabled via baseband processor GPIO. Use Value: 80 µA typical bias current minimizes impact on shared 2.8 V bias rail; active discharge prevents sensor latch-up during power sequencing. |
Use Scenario: Supplying HDMI PHY core voltage in set-top box SoCs where EMI compliance limits switching regulator use. IC Role / Device Role / Timing Role: Fixed-output LDO replacing discrete filtering stages for HDMI 2.1 compliance testing. Use Value: 80 dB PSRR at 1 kHz suppresses noise from adjacent DDR memory switching; XDFN6 footprint fits tight HDMI connector zones. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar low-noise, dual-rail LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Torex XC6210B185MR-G | Single-rail (VIN only); no VBIAS input; 100 mA output; ±2.0% accuracy; no active discharge. | Lacks bias rail isolation and output discharge - unsuitable for sequenced multi-rail systems requiring controlled VOUT ramp-down. | Select when cost sensitivity outweighs noise/isolation requirements and system uses single-input power architecture. |
| Richtek RT9080AL-185GJ6F | Single-rail; 200 mA output; ±1.5% accuracy; 120 mV dropout; no active discharge; 2.5 V min VIN. | Higher dropout and minimum input limit restrict use with deeply discharged Li-ion; no VBIAS decoupling degrades PSRR above 100 kHz. | Choose for higher current needs where 1.85 V tolerance > ±1.0% is acceptable and board space permits larger SOT-23-6 package. |
Compared with XC6210B185MR-G and RT9080AL-185GJ6F, the NCP121AMX185TCG uniquely combines dual-rail operation, ±1.0% accuracy, active discharge, and XDFN6 size - making it the only option supporting simultaneous low-noise, low-dropout, and controlled power sequencing in ultra-compact portable designs.
Availability
NCP121AMX185TCG is available at Aetrix Electronics and suitable for smartphone application processor core rails, tablet GPU I/O supplies, wireless camera sensor interfaces, STB HDMI transmitter core supplies, and other noise-sensitive, space-constrained applications requiring stable component supply and long-term lifecycle support.
Supply support for NCP121AMX185TCG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensors, and connectivity solutions for automotive, industrial, cloud, and consumer markets.
The NCP121AMX185TCG belongs to onsemi's high-accuracy VLDO family designed specifically for post-regulation in battery-powered portable electronics where ultra-low noise, minimal dropout, and small footprint are mandatory.
FAQ
What is the output voltage tolerance of the NCP121AMX185TCG over temperature and load?
The NCP121AMX185TCG guarantees ±1.0% output voltage accuracy across −40°C to +85°C junction temperature, full 1–150 mA load range, and input voltage from VOUT+VDO to 5.0 V. At 25°C only, accuracy tightens to ±0.2%, verified per onsemi's Electrical Characteristics table. This tolerance ensures reliable operation in mobile devices experiencing wide thermal and load swings.
Does the NCP121AMX185TCG require an external resistor divider for output voltage setting?
No, the NCP121AMX185TCG is a fixed-output regulator with factory-trimmed 1.85 V output - no external resistors are needed. This eliminates calibration drift, saves PCB area, and removes potential sources of noise injection from feedback traces. All variants in the NCP121A series (including NCP121AMX185TCG) use laser-trimmed internal references.
Can the NCP121AMX185TCG operate with only the VIN pin powered, leaving VBIAS unconnected?
No - the NCP121AMX185TCG requires both VIN and VBIAS to be within specification (VBIAS ≥ 2.4 V, typically ≥ VOUT + 1.35 V) for proper operation. Leaving VBIAS unconnected disables internal control circuitry, causing undefined behavior or complete failure. The VBIAS pin powers the reference, error amplifier, and protection circuits - it is not optional.
What is the purpose of the N/C pin (Pin 2) on the NCP121AMX185TCG?
Pin 2 of the NCP121AMX185TCG is Not Connected internally - it has no electrical function and must remain unconnected on the PCB. Routing or grounding this pin may cause mechanical stress or unintended parasitic coupling. The XDFN6 package uses this pin position solely for mechanical symmetry and thermal pad alignment, not signal integrity.
Is active output discharge available on all NCP121 variants, or only specific part numbers?
Active output discharge is exclusive to NCP121A-series devices like the NCP121AMX185TCG - confirmed by Figure 2 block diagram footnote and Ordering Information table. Standard NCP121 (non-A) variants lack this feature. The discharge path is implemented as a 150 Ω internal FET between OUT and GND, activated only when EN is low, ensuring safe, rapid VOUT collapse without external components.
NCP121AMX185TCG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 6-XFDFN Exposed Pad
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.85V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.075V @ 150mA
- Current - Output:
- 150mA
- Current - Quiescent (Iq):
- -
- Current - Supply (Max):
- -
- PSRR:
- 80dB ~ 70dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XDFN (1.2x1.2)
NCP121AMX185TCG FAQ
1.How can I place an order for NCP121AMX185TCG through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP121AMX185TCG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP121AMX185TCG reliable?
The price and inventory of NCP121AMX185TCG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP121AMX185TCG is usually 5 days.
3.What payment methods are accepted for NCP121AMX185TCG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP121AMX185TCG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP121AMX185TCG?
NCP121AMX185TCG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP121AMX185TCG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP121AMX185TCG?
For technical support, including NCP121AMX185TCG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP121AMX185TCG requirements.
6.How does Aetrix verify that NCP121AMX185TCG is sourced from the original manufacturer or authorized distributors?
All NCP121AMX185TCG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP121AMX185TCG meets industry standards.
7.What is the process for return or replacement of NCP121AMX185TCG?
All NCP121AMX185TCG units undergo pre-shipment inspection (PSI). If there is an issue with NCP121AMX185TCG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP121AMX185TCG part is unused and in its original packaging.
Return procedure for NCP121AMX185TCG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NCP121AMX185TCG Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

