onsemi NCP133AMX150TCG
- Part No.:
- NCP133AMX150TCG
- Manufacturer:
- onsemi
- Package:
- 6-XFDFN Exposed Pad
- Datasheet:
-
NCP133AMX150TCG.pdf
- Description:
- IC REG LINEAR 1.5V 500MA 6XDFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,017
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NCP133AMX150TCG from onsemi is a 500 mA very low dropout (VLDO) CMOS voltage regulator with NMOS pass transistor and separate VBIAS supply, delivering 1.50 V fixed output with ±1.5% accuracy over temperature, 140 mV typical dropout at 500 mA, and ultra-low 80 µA bias current - designed for noise-sensitive, space-constrained portable power rails such as smartphone core I/O or camera sensor biasing.
For engineers reviewing the NCP133AMX150TCG datasheet, pinout, applications, or equivalent options, key selection criteria include its dual-rail architecture (VIN + VBIAS), active output discharge capability, XDFN6 1.2 mm × 1.2 mm package, and compatibility with 2.2 µF ceramic output capacitors without external compensation.
Technical Context
The NCP133AMX150TCG implements a dual-input NMOS-based VLDO architecture where VIN supplies the pass element while VBIAS powers internal control circuitry - enabling stable regulation even when VIN approaches VOUT. Its UVLO circuit monitors VBIAS with 1.6 V threshold and 0.2 V hysteresis to prevent erratic startup.
It integrates thermal shutdown (160°C trip, 140°C release), current limiting (550–1000 mA), and logic-level enable (VEN(H) = 0.9 V) with active output discharge - a feature confirmed exclusive to the "AMX" variant family including NCP133AMX150TCG per Figure 2 and ordering table.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | Fixed 1.50 V - eliminates external resistor network, reduces BOM count and layout area in compact DC/DC post-regulation. |
| Max Output Current | 500 mA - supports moderate-power digital I/O rails, image sensor analog supplies, or FPGA auxiliary voltages. |
| VIN Dropout | 140 mV typ. at 500 mA - enables operation with minimal headroom (e.g., 1.65 V input for 1.50 V output), critical for battery-powered systems. |
| VBIAS Range | 2.4 V to 5.5 V - allows use of shared system bias rail (e.g., 3.3 V or 5 V) independent of VIN, improving PSRR and efficiency. |
| Output Accuracy | ±1.5% over −40°C to +85°C - ensures reliable logic-level compliance across industrial temperature range without calibration. |
| PSRR (VBIAS) | 80 dB at 1 kHz - suppresses noise from shared bias rails, essential for ADC reference or RF front-end power integrity. |
| Output Noise | 40 µVRMS (10 Hz–100 kHz) - meets low-noise requirements for precision analog circuits and high-resolution imaging sensors. |
| Enable Threshold | VEN(H) = 0.9 V - compatible with 1.2 V, 1.8 V, or 3.3 V GPIOs without level-shifting, simplifying host control interface. |
Pinout & Package
XDFN6 package (Case 711AT), 1.2 mm × 1.2 mm × 0.4 mm, thermally enhanced with exposed pad soldered to ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - OUT | Regulated output voltage node | Delivers stable 1.50 V to load; requires direct connection to 2.2 µF ceramic capacitor for stability. |
| 2 - N/C | No internal connection | True no-connect; PCB trace may be routed but must not be electrically tied to any net. |
| 3 - EN | Logic-level enable input | Active-high control: ≥0.9 V enables regulator; ≤0.4 V disables with 0.5 µA bias current and active discharge. |
| 4 - BIAS | Bias supply for internal circuitry | Powers reference, error amp, and protection blocks; must be ≥2.4 V and monitored by UVLO. |
| 5 - GND | Analog and power ground | Common return for IN, OUT, BIAS, and EN; exposed pad must be soldered to PCB ground plane for thermal performance. |
| 6 - IN | Main input voltage supply | Feeds NMOS pass transistor; supports 0.8 V to 5.5 V, with dropout defined relative to OUT. |
Key Features
| Feature | Design Value |
|---|---|
| Active output discharge | Integrated 150 Ω pull-down on OUT during disable - prevents floating voltage, eliminates need for external bleed resistor in sequencing-critical systems. |
| Dual-rail architecture | Separate VIN and VBIAS inputs - decouples pass transistor drive from control circuitry supply, enabling higher PSRR and lower noise than single-rail LDOs. |
| Ultra-low bias current | 80 µA typ. at 2.7 V VBIAS - minimizes parasitic drain on shared bias rails in multi-rail portable devices. |
| Stable with small ceramics | Guaranteed stability with 2.2 µF effective ceramic output capacitance - reduces footprint vs. tantalum or larger MLCCs, avoids ESR dependency. |
| Monotonic start-up | Controlled VOUT ramp - limits inrush current into downstream capacitance, preventing brown-out in tightly coupled power domains. |
| Thermal & current protection | Auto-recovering thermal shutdown (160°C/140°C) and current limit (550–1000 mA) - protects against sustained overload without latch-up or manual reset. |
Applications
| Smartphone Core I/O Rail | Camera Sensor Bias Supply |
|---|---|
|
Use Scenario: Powering 1.5 V I/O interfaces (e.g., MIPI D-PHY, SDIO) in modern smartphones where battery voltage drops below 3.0 V. IC Role / Device Role / Timing Role: Post-regulator after buck converter, providing clean, low-noise 1.5 V rail with fast enable/disable for power gating. Use Value: 140 mV dropout enables >95% efficiency at 1.65 V input; 40 µVRMS noise prevents bit errors in high-speed serial links. |
Use Scenario: Supplying analog bias voltage to CMOS image sensor pixel arrays and ADC front-ends in mobile cameras. IC Role / Device Role / Timing Role: Low-noise, low-drift voltage source synchronized to sensor frame timing via EN pin control. Use Value: 80 µA VBIAS current avoids loading shared 3.3 V bias rail; ±1.5% accuracy maintains consistent sensor gain calibration. |
| Tablet Application Processor Auxiliary Rail | DVR Video Decoder Core Supply |
|
Use Scenario: Delivering 1.5 V to GPU or video codec subsystems in tablets operating from single-cell Li-ion (2.8–4.2 V). IC Role / Device Role / Timing Role: Secondary LDO for dynamic voltage scaling (DVS), enabled/disabled in concert with processor DVFS states. Use Value: Active discharge ensures rapid rail collapse during sleep mode; monotonic start-up prevents logic glitches during wake-up. |
Use Scenario: Powering real-time video decoder ASIC cores requiring stable 1.5 V under bursty decode workloads. IC Role / Device Role / Timing Role: High-current, low-noise local regulator placed near decoder die to minimize IR drop and noise coupling. Use Value: 500 mA rating handles peak current surges; 80 dB VBIAS PSRR rejects noise from shared system bias rail during heavy decoding. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar very low dropout voltage regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TI TPS7A1615DRBR | 150 mA max output, 200 mV dropout at 150 mA, no VBIAS rail, 30 µVRMS noise | Limited to ultra-low-power loads; lacks active discharge and dual-rail architecture | Select only if current demand <150 mA and board space permits larger 2.0 mm × 2.0 mm SON package. |
| Richtek RT9080L-15GJ5 | 300 mA max output, 120 mV dropout at 300 mA, no VBIAS, no active discharge, 65 µVRMS noise | Lower current capacity and higher noise; suitable only for non-critical digital rails | Choose when cost sensitivity outweighs noise and discharge requirements, and load current stays ≤300 mA. |
Compared with TPS7A1615DRBR and RT9080L-15GJ5, the NCP133AMX150TCG uniquely delivers 500 mA output with dual-rail architecture, active discharge, and industry-leading 40 µVRMS noise - making it the only option qualified for noise-sensitive, high-current, sequencing-critical portable applications.
Availability
NCP133AMX150TCG is available at Aetrix Electronics and suitable for smartphone I/O regulation, camera sensor biasing, tablet auxiliary power, and DVR video core supply requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for NCP133AMX150TCG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensing, and connectivity solutions for automotive, industrial, cloud, and portable markets.
The NCP133AMX150TCG belongs to onsemi's bias-rail VLDO product line, engineered specifically for space-constrained, noise-sensitive portable electronics where dual-supply architecture and active discharge improve system-level power sequencing and signal integrity.
FAQ
What is the maximum input voltage supported by the NCP133AMX150TCG?
The NCP133AMX150TCG supports an absolute maximum input voltage (VIN) of 6 V per its Absolute Maximum Ratings table. However, for continuous safe operation, the recommended operating input voltage range is 0.8 V to 5.5 V. Exceeding 6 V risks permanent damage to the internal NMOS pass transistor and control circuitry, regardless of duration or current level.
Does the NCP133AMX150TCG require an external feedback resistor network?
No, the NCP133AMX150TCG does not require an external feedback resistor network because it is a fixed-output version delivering 1.50 V. Unlike adjustable variants (e.g., NCP133AMXADJTCG), this part integrates the voltage reference and feedback divider internally - reducing component count, PCB area, and potential tolerance-induced output error.
Is active output discharge present in the NCP133AMX150TCG?
Yes, active output discharge is confirmed for the NCP133AMX150TCG. As stated in the datasheet's Figure 2 caption and Ordering Information table, the "AMX" suffix denotes inclusion of the active discharge function, which pulls the OUT pin to GND through a 150 Ω internal switch when EN is low - ensuring rapid, controlled rail collapse during shutdown.
What is the minimum required VBIAS voltage for the NCP133AMX150TCG?
The minimum required VBIAS voltage for the NCP133AMX150TCG is 2.4 V, as specified in the Operating Bias Voltage Range parameter. Additionally, the datasheet mandates that VBIAS must be ≥ (VOUT + 1.40 V) - for the 1.50 V output, this means VBIAS ≥ 2.90 V under typical conditions. The UVLO circuit enforces this with a 1.6 V rising threshold and 0.2 V hysteresis.
Can the NCP133AMX150TCG operate with only the VIN supply and no VBIAS connection?
No, the NCP133AMX150TCG cannot operate without a valid VBIAS supply. The VBIAS pin powers all internal control circuitry including the voltage reference, error amplifier, and protection blocks. If VBIAS is unconnected or below UVLO threshold (≤1.4 V), the device remains in shutdown regardless of EN state or VIN level - as confirmed in the PIN FUNCTION DESCRIPTION and Figure 2 block diagram.
NCP133AMX150TCG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 6-XFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.5V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.25V @ 500mA
- Current - Output:
- 500mA
- Current - Quiescent (Iq):
- -
- Current - Supply (Max):
- -
- PSRR:
- 80dB ~ 70dB (1kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XDFN (1.2x1.2)
NCP133AMX150TCG FAQ
1.How can I place an order for NCP133AMX150TCG through Aetrix?
Please submit a Request for Quotation (RFQ) for NCP133AMX150TCG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NCP133AMX150TCG reliable?
The price and inventory of NCP133AMX150TCG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NCP133AMX150TCG is usually 5 days.
3.What payment methods are accepted for NCP133AMX150TCG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NCP133AMX150TCG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NCP133AMX150TCG?
NCP133AMX150TCG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NCP133AMX150TCG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NCP133AMX150TCG?
For technical support, including NCP133AMX150TCG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NCP133AMX150TCG requirements.
6.How does Aetrix verify that NCP133AMX150TCG is sourced from the original manufacturer or authorized distributors?
All NCP133AMX150TCG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NCP133AMX150TCG meets industry standards.
7.What is the process for return or replacement of NCP133AMX150TCG?
All NCP133AMX150TCG units undergo pre-shipment inspection (PSI). If there is an issue with NCP133AMX150TCG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NCP133AMX150TCG part is unused and in its original packaging.
Return procedure for NCP133AMX150TCG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NCP133AMX150TCG Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

