onsemi NCP137AFCT120T2G

Overview

NCP137AFCT120T2G from onsemi is a 700 mA very low dropout (VLDO) linear regulator with NMOS pass transistor and separate VBIAS rail, delivering fixed 1.20 V output with ±1.0% accuracy over −40 °C to +85 °C, ultra-low 40 mV typical dropout at full load, and active output discharge - designed for space-constrained, noise-sensitive mobile power rails including smartphone core voltage regulation.

For engineers reviewing the NCP137AFCT120T2G datasheet, pinout, applications, or equivalent options, key selection criteria include its dual-rail architecture (VIN + VBIAS), WLCSP6 package footprint (1.2 mm × 0.8 mm), bias current of 35 µA typ., PSRR of 85 dB (VBIAS-to-VOUT), and guaranteed stability with 10 µF ceramic output capacitor.

Technical Context

The NCP137AFCT120T2G implements a dual-supply NMOS-based VLDO architecture where VIN supplies the pass element while VBIAS powers internal control circuitry - enabling stable regulation even when VIN approaches VOUT. Its internal reference is trimmed to 0.500 V, and feedback is implemented via SNS pin tied directly to the regulated 1.20 V output.

This fixed-output variant integrates active output discharge (enabled only in "A" option parts), thermal shutdown at 160 °C, undervoltage lockout on VBIAS with 1.6 V threshold and 0.2 V hysteresis, and logic-level EN input with 0.9 V high-threshold - all operating within a junction temperature range of −40 °C to +150 °C.

Key Specifications

Pinout & Package

Package: WLCSP6 (Case 567MV), 1.2 mm × 0.8 mm, 0.4 mm pitch, bottom-solder-ball mounting - optimized for ultra-thin mobile PCBs with strict Z-height constraints.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with Torex XC6217D122MR-G and Richtek RT9080L-12PUF, the NCP137AFCT120T2G uniquely delivers 40 mV dropout, VBIAS-isolated control, and integrated active discharge - making it the only option among the three qualified for smartphone SoC core rail post-regulation with full power sequencing compliance.

Availability

NCP137AFCT120T2G is available at Aetrix Electronics and suitable for smartphone power management, tablet SoC core regulation, and camera module analog supply requiring stable component supply, long-term lifecycle support, and RoHS-compliant WLCSP packaging.

Supply support for NCP137AFCT120T2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensing, and connectivity solutions for automotive, industrial, cloud, and mobile markets.

The NCP137AFCT120T2G belongs to onsemi's high-performance LDO portfolio targeting space-constrained, noise-sensitive portable electronics - engineered specifically for dual-rail operation, ultra-low dropout, and seamless integration into multi-voltage mobile power architectures.

FAQ

What is the output voltage tolerance of the NCP137AFCT120T2G across temperature?

The NCP137AFCT120T2G provides ±1.0% output voltage accuracy over the full operating junction temperature range of −40 °C to +85 °C, with tighter ±0.5% tolerance at +25 °C. This specification is guaranteed under defined test conditions including VBIAS ≥ (VOUT + 1.5 V), VIN = VOUT(NOM) + 0.3 V, and load current from 1 mA to 700 mA - ensuring reliable core voltage delivery for mobile processors across environmental extremes.

Does the NCP137AFCT120T2G require an external resistor divider for output setting?

No, the NCP137AFCT120T2G is a fixed-output variant delivering 1.20 V without external resistors. Its SNS pin connects directly to the VOUT trace for precision feedback, eliminating component count and layout sensitivity. This differs from adjustable NCP137 variants (e.g., NCP137AFCTADJT2G), which use FB and external R1/R2 to set output between 0.5 V and 3.0 V - confirming that NCP137AFCT120T2G simplifies design for standardized 1.2 V rails.

What is the purpose of the VBIAS pin on the NCP137AFCT120T2G?

The VBIAS pin on the NCP137AFCT120T2G supplies power exclusively to internal control circuitry - including the bandgap reference, error amplifier, and bias generators - isolating them from the main VIN rail. This architecture enables 85 dB PSRR from VBIAS to VOUT, reduces noise coupling, and allows operation with VIN as low as VOUT + 40 mV while maintaining regulation integrity - a key differentiator of the NCP137AFCT120T2G versus conventional single-rail LDOs.

Is active output discharge enabled on the NCP137AFCT120T2G?

Yes, active output discharge is enabled on the NCP137AFCT120T2G, as confirmed by its "A" option designation and marking code "AD". When the EN pin is driven low, an internal ~150 Ω pull-down discharges the VOUT capacitor within 150 µs - preventing residual voltage from interfering with power sequencing or causing latch-up in downstream logic. This feature is absent in "B" option parts like NCP137BFCTADJT2G, making NCP137AFCT120T2G essential for systems requiring strict rail collapse timing.

What minimum output capacitance is required for stability with the NCP137AFCT120T2G?

The NCP137AFCT120T2G is specified to be stable with a minimum effective output capacitance of 10 µF ceramic - recommended for all fixed-output versions including NCP137AFCT120T2G. This value accounts for DC bias derating; actual capacitor selection must ensure ≥10 µF effective capacitance at 1.20 V bias and operating temperature. Using smaller values risks instability and oscillation, while larger values (up to 22 µF) are permissible and may improve transient response - validating the 10 µF baseline as the critical stability threshold for NCP137AFCT120T2G.